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Advances in hardware reliability of reconfigurable many-core embedded systems

Advances in hardware reliability of reconfigurable many-core embedded systems

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The chapter discusses the background for the most demanding dependability challenges for reconfigurable processors in many-core systems and presents a dependable runtime reconfigurable processor for high reliability. It uses an adaptive modular redundancy technique that guarantees an application-specified level of reliability under changing SEU rates by budgeting the effective critical bits among all kernels and all accelerators of an application. This allows to deploy reconfigurable processors in harsh environments without statically protecting them.

Chapter Contents:

  • 16.1 Background
  • 16.1.1 Runtime reconfigurable processors
  • 16.1.2 Single event upset
  • 16.1.3 Fault model for soft errors
  • 16.1.4 Concurrent error detection in FPGAs
  • 16.1.5 Scrubbing of configuration memory
  • 16.2 Reliability guarantee with adaptive modular redundancy
  • 16.2.1 Architecture for dependable runtime reconfiguration
  • 16.2.2 Overview of adaptive modular redundancy
  • 16.2.3 Reliability of accelerated functions (AFs)
  • 16.2.4 Reliability guarantee of accelerated functions
  • Maximum resident time
  • Acceleration variants selection
  • Non-uniform accelerator scrubbing
  • 16.2.5 Reliability guarantee of applications
  • Effective critical bits of accelerators
  • Reliability of accelerated kernels
  • Effective critical bits of accelerated kernels and applications
  • Budgeting of effective critical bits
  • Budgeting for kernels
  • Budgeting for accelerated functions
  • 16.2.6 Experimental evaluation
  • 16.3 Conclusion and future directions
  • Acknowledgements
  • References

Inspec keywords: reconfigurable architectures; parallel architectures; multiprocessing systems; fault tolerant computing; redundancy; embedded systems

Other keywords: reconfigurable many-core embedded systems; application-specified reliability level; reconfigurable processors; SEU rates; adaptive modular redundancy; accelerators; dependable runtime reconfigurable processor; critical bits; hardware reliability

Subjects: Multiprocessing systems; Performance evaluation and testing; Parallel architecture

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