The purpose of this chapter is to develop a review of state-of-the-art techniques and methodologies for the self-testing of multicore processors. The chapter is divided into two main sections: (a) self-testing solutions covering general-purpose multicore microprocessors such as chip multiprocessors (CMPs) and (b) self-testing solutions targeting application-specific multicore designs known as SoCs. In the first section (general-purpose), a taxonomy of current self-testing approaches is initially presented, followed by a review of the state-of-the-art for each class. The second section (application-specific) provides an overview of the test scheduling flows for multicore SoCs, as well as the testing strategies for the individual components (sub-systems) of such systems.

Chapter Contents:

• 15.1 General-purpose multicore systems
• 15.1.1 Taxonomy of on-line fault detection methods
• 15.1.2 Non-self-test-based methods
• 15.1.3 Self-test-based methods
• 15.1.3.1 Hardware-based self-testing
• 15.1.3.2 Software-based self-testing
• 15.1.3.3 Hybrid self-testing methods (hardware/software)
• 15.2 Processors-based systems-on-chip testing flows and techniques
• 15.2.1 On-line testing of CPUs
• 15.2.1.1 SBST test library generation constraints
• 15.2.1.2 Execution management of the SBST test program
• 15.2.1.3 Comparison of SBST techniques for in-field test programs development
• 15.2.2 On-line testing of application-specific functional units
• 15.2.2.1 Floating-point unit
• 15.2.2.2 Test for FPU
• 15.2.2.3 Direct memory access
• 15.2.2.4 Error correction code
• 15.3 Conclusion and future directions
• References

Inspec keywords: built-in self test; automatic testing; integrated circuit testing; hardware-software codesign; system-on-chip; multiprocessing systems

Other keywords: multicore processors; self-testing; CMPs; test scheduling flows; general-purpose multicore microprocessors; SoCs; state-of-the-art techniques; chip multiprocessors; application-specific multicore designs

Subjects: Semiconductor integrated circuit design, layout, modelling and testing; System-on-chip; Multiprocessing systems; Hardware-software codesign; Digital circuit design, modelling and testing; System-on-chip