This chapter discusses the various methods of electrical modelling of CNT- and GNR-based nano-interconnects. It also presents the ABCD parameter matrix-based method for the modelling of performance and signal integrity effects in CNT- and GNR-based VLSI nano-interconnects. The developed methodology is proven to be almost 100% accurate as SPICE with huge reduction in the computational burden. It is pointed out that both CNTs and GNRs have tremendous potential in becoming the next generation VLSI interconnects.
Modelling interconnects for future VLSI circuit applications, Page 1 of 2
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