Phase change memory (PCM) functions by thermally induced phase change of chalcogenide material, typically from disordered highly resistive amorphous phase with short range atomic order and low free electron density, to a low resistance crystalline phase with long range atomic order and high free electron density, or vice versa [1,2]. PCM is one of the potential emerging nonvolatile memory (NVM) technologies to replace flash memory and be the technology for storage class memory due to its desirable properties such as short access time, long data retention, high endurance, scalability, CMOS compatibility and multibit storage [3-8]. Hence it is time to have an accurate electrical model of the PCM in order to realise a straightforward and timely implementation of PCM in an integrated circuit. This chapter presents the electrical circuit model of multibit PCM cell that accurately simulates the temperature profile, the crystalline fraction and the resistance of the cell as a function of the programming pulse. Also, the precise modelling of the drift phenomenon of resistance and threshold voltage at the amorphous phase is presented. The presented model's I-V characteristics are correlated with experimental data to demonstrate the validity of the developed PCM model. Next this chapter presents the analysis of PCM cells on a nanocrossbar as a memory system. The effect of connecting wires resistance in the performance of the PCM array structure, the amount of energy lost across each PCM cell and programmed state of the PCM cell is also discussed. It has been shown that the energy consumed in connecting wires decreases the power supplied to PCM cells thus resulting in higher programmed low resistive state (Rcrystalline). Additionally, methods to mitigate the programmedRcrystalline reliability issue are discussed in detail. Finally, the chapter concludes with the discussion on PCM-based memory application in implementing a logic function using the look-up-table (LUT), that is, PCM-based LUTs.

Chapter Contents:

• 13.1 Introduction
• 13.2 PCM electrical circuit model
• 13.2.1 Resistance calculating subcircuit
• 13.2.2 Temperature calculating subcircuit
• 13.2.3 Crystalline ratio calculating subcircuit
• 13.2.4 Drift calculating subcircuit
• 13.2.5 MLPCM cell circuit model I–V characteristics
• 13.3 PCM-based memory nanocrossbars
• 13.3.1 Nanowire resistance modelling and its performance effects
• 13.3.2 Mitigation of nanowire resistance effects
• 13.3.3 Leakage currents in nanocrossbars and mitigating methods
• 13.3.4 Drift in PCM cells
• 13.4 MLPCM logic application
• References

Inspec keywords: phase change memories; performance evaluation; nanoelectronics; table lookup; electrical resistivity

Other keywords: logic function; nanocrossbar performance analysis; PCM-based memory application; PCM model; look-up-table; electrical circuit modelling; phase change memory; PCM-based LUTs; phase change; wires resistance; PCM array structure; storage class memory; nonvolatile memory technologies; multibit PCM cell

Subjects: Memory circuits; Performance evaluation and testing; Semiconductor storage