This chapter discusses the design aspects of TSVs for 3D -IC applications. To improve the performance of TSVs, different insulating liners with low dielectric constants are used in place of the conventional insulating liner. Moreover, it has been noticed that the TSVs with copper filler material faces many problems such as skin effect, high resistance and electromigration effects. In order to overcome these problems and to improve the signal integrity, multiwalled carbon nanotubes (MWCNTs) are used that further improves the performance of TSVs. All the proposed structures are designed using the industry standard HSPICE simulator. The performance improvements in the proposed structures are verified by comparing the results with the conventional TSVs.

Chapter Contents:

• 10.1 Introduction
• 10.2 Classification of insulating liners
• 10.3 Major challenges for TSV implementation
• 10.3.1 Designing
• 10.3.2 Cost
• 10.3.3 Manufacturing
• 10.3.4 Warpage
• 10.3.5 Testing
• 10.4 CNT-based TSVs possibilities
• 10.4.1 Large contact resistance
• 10.4.2 Chirality control
• 10.4.3 Defect free CNTs
• 10.4.4 CNT growth at high temperature
• 10.4.5 Densely packed CNT bundles
• 10.5 Modelling of MWCNT-based TSVs with SiO2
• 10.6 Modelling of MWCNT-based TSVs with polymer
• 10.7 Performance investigation of MWCNT-based TSV
• 10.7.1 In-phase delay, out-phase delay and crosstalk noise
• 10.7.2 Power dissipation, power and energy delay products
• 10.8 Summary
• References

Inspec keywords: three-dimensional integrated circuits; multi-wall carbon nanotubes; permittivity; copper; integrated circuit design

Other keywords: industry standard HSPICE simulator; insulating liner; Cu; 3D IC applications; copper filler material; TSV performance; through silicon vias design; multiwalled carbon nanotubes; MWCNTs; low dielectric constants; signal integrity

Subjects: Semiconductor integrated circuit design, layout, modelling and testing