The tremendous scaling of the semiconductor devices is producing the high-density integrated circuits (ICs). Metal-oxide-semiconductor field-effect transistors (MOSFETs) are the basic building blocks for the ICs. The lower area requirement with increased numbers of devices on a substrate makes it an interesting field of very-large-scale integration (VLSI) design. The reliability of the logic circuits is the concern issue in modern-era electronics. Reliability affects the overall performance of the logic circuits and possibility to the failure of the semiconductor devices. Negative bias temperature instability (NBTI) degradation is the major concern in ultra-deep submicron (DSM) regime. The negative threshold voltage of PMOS device when shifted in NBTI effect causes performance degradation over the time. NBTI degradation is the aging effect for PMOS device. This chapter presents the overview of NBTI effect and its possible solution.

Chapter Contents:

• 2.1 Introduction
• 2.2 Techniques for NBTI mitigation
• 2.2.1 Input vector control
• 2.2.2 Gate-replacement method
• 2.2.3 Adaptive power supply
• 2.2.4 Body biasing
• 2.2.5 Gate-sizing technique
• 2.2.6 Power-gating technique
• 2.2.7 Aging-monitoring techniques
• 2.3 Summary
• References

Inspec keywords: MOSFET; integrated circuit design; semiconductor device reliability; leakage currents; integrated circuit reliability; VLSI; logic circuits

Other keywords: metal-oxide-semiconductor field-effect transistors; interesting field; negative bias temperature instability degradation; NBTI effect; semiconductor devices; ICs; high-density integrated circuits; negative bias temperature instability aware low leakage circuit design; tremendous scaling; logic circuits; NBTI degradation; very-large-scale integration design; lower area requirement; PMOS device; negative threshold voltage; modern-era electronics

Subjects: Reliability; Logic and switching circuits; Insulated gate field effect transistors; Logic circuits