Multi-level watermark for IP protection

Multi-level watermark for IP protection

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The chapter describes a multi-level watermarking process for intellectual property (IP) cores that leverages the electronic-system level (ESL) and register-transfer level (RTL). A detailed elaboration is provided on the salient features of this multilevel watermarking approach followed by its encoding technique, embedding process, detection process and, finally, implementation details using case studies. The chapter is organized as follows: Section 5.1 discusses the abstraction levels of a digital design followed by some IP protection basics; Section 5.2 introduces some of the prior works in this domain; Section 5.3 presents the salient features and advantages of a multi-level watermarking process; Section 5.4 explains the signature-embedding process for digital signal processor (DSP) cores; Section 5.5 discusses the design process of a multi-level watermarked IP core using a finite impulse response (FIR) filter; Section 5.6 presents the signature detection details of a multi-level watermark; Section 5.7 presents an analysis based on case studies; Section 5.8 concludes the chapter.

Chapter Contents:

  • 5.1 Introduction
  • 5.2 Discussion on selected approaches
  • 5.3 Salient features and advantages of multi-level watermarks
  • 5.4 Embedding signatures as secret marks
  • 5.4.1 Problem formulation
  • 5.4.2 Details of multi-level watermarks
  • Overview of multi-level watermarks
  • Signature encoding
  • Signature embedding process
  • 5.5 Design process of a multi-level watermarked IP core
  • 5.6 Signature detection in a multi-level watermarked IP core
  • 5.7 Analysis based on case studies
  • 5.7.1 Security and design cost analyses
  • 5.7.2 Comparative study
  • 5.8 Conclusion
  • 5.9 Questions and exercises
  • References

Inspec keywords: microprocessor chips; watermarking; logic circuits; FIR filters; digital signatures; embedded systems; encoding

Other keywords: abstraction levels; encoding technique; intellectual property cores; register-transfer level; FIR filter; finite impulse response filter; digital signal processor cores; multilevel watermarking process; digital design; detection process; IP protection basics; signature-embedding process; electronic-system level

Subjects: Filtering methods in signal processing; Cryptography; Data security; Microprocessor chips; Logic circuits; Logic and switching circuits; Microprocessors and microcomputers

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