Asynchronous circuits are inherently suitable for radiation-exposed environments due to their quasidelay insensitivity (QDI) and multirail logic systems. If an ionizing -radiation event is detected, the QDI property provides the ability to delay the current operation within the circuit until the effect has subsided. The dual -rail design provides additional support in this area because in many cases both rails must be affected in order for an SEU to occur. In addition to mitigating SEEs through asynchronous circuit -level architectures, radiation hardening techniques can be applied to transistor -level layout designs and circuit components, such as the DFF, for increased reliability.

Chapter Contents:

• 11.1 Asynchronous architectures for mitigating SEE
• 11.1.1 NCL multibit SEU and data-retaining SEL architecture
• 11.2 Radiation hardened asynchronous NCL library and component design
• 11.3 Analyzing radiation hardness
• References

Inspec keywords: asynchronous circuits; logic design; radiation hardening (electronics)

Other keywords: transistor-level layout designs; reliability; radiation hardening techniques; SEU; radiation-exposed environments; asynchronous circuit level architectures; SEE mitigation; ionizing-radiation event; QDI property; quasidelay insensitivity; multirail logic systems; dual-rail design; circuit components

Subjects: Logic design methods; Logic and switching circuits; Digital circuit design, modelling and testing; Logic circuits; Radiation effects (semiconductor technology)