Structural obfuscation of DSP cores used in CE devices

Structural obfuscation of DSP cores used in CE devices

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Previous chapters, watermarking, fingerprinting, and forensic engineering have been discussed for resolving various ownership-related problems. This chapter discusses structural obfuscation approaches to thwart IP piracy and reverse engineering (RE). This approach, when effective, can save billions of dollars of revenue losses in CE and semiconductor industry. Especially, a multi-high-level transformation-based structural obfuscation process has been presented for DSP IP cores as hardware-hardening technique. The chapter is structured as follows: Section 7.2 highlights the fundamentals of obfuscation with stress on structural obfuscation; Section 7.3 discusses different compiler transformation-driven structural obfuscation methodology. Section 7.4 discusses low-cost structurally obfuscated design exploring technique. Section 7.5 demonstrates a multistage structural obfuscation technique through a motivational example. Section 7.6 presents the results of a case study.

Chapter Contents:

  • 7.1 Introduction
  • 7.1.1 Threat model
  • 7.1.2 Benefits of providing security at higher design abstraction level
  • 7.2 Obfuscation for IP core protection—a broad view
  • 7.2.1 Code obfuscation techniques
  • 7.2.2 Logic obfuscation techniques
  • 7.2.3 Structural obfuscation techniques
  • 7.3 Compiler transformation-driven structural obfuscation
  • 7.3.1 Formulation and evaluation models
  • Formulation
  • Evaluation models
  • 7.3.2 Multistage high-level transformation techniques
  • 7.4 Low-cost structural obfuscation for DSP IP core
  • 7.4.1 Overview on PSO
  • 7.4.2 Movement of particle
  • 7.4.3 Terminating condition of PSO
  • 7.5 A case study for multistage structural obfuscation
  • 7.6 Analysis of case studies
  • 7.6.1 Result of multistage structural obfuscation
  • 7.6.2 Comparative study and discussion
  • 7.7 Conclusion
  • 7.8 Exercises
  • References

Inspec keywords: digital signal processing chips; industrial property; reverse engineering; software engineering

Other keywords: hardware-hardening technique; DSP IP cores; multistage structural obfuscation technique; DSP cores; IP piracy; reverse engineering; semiconductor industry; structural obfuscation approaches; forensic engineering; CE devices; compiler transformation-driven structural obfuscation methodology; multihigh-level transformation-based structural obfuscation process

Subjects: Digital signal processing chips; Digital signal processing chips; Software engineering techniques

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