IP core and integrated circuit protection using robust watermarking

IP core and integrated circuit protection using robust watermarking

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This chapter discusses robust watermarking approaches for the ownership protection of hardware cores [a.k.a. intellectual property (IP) cores]. Watermarking ensures some additional attributes inserted in the hardware core such a way that it can be used to verify ownership of the hardware core when required. Robust watermarking approaches have been discussed as these are resilient to various attacks that happen in global supply chain for various reasons.

Chapter Contents:

  • 4.1 Introduction
  • 4.2 Selected watermarking approaches
  • 4.3 Design process of watermarked IP core/hardware
  • 4.3.1 Problem formulation
  • 4.3.2 Design process of single-phase watermarked IP core/hardware
  • Process of generating DFG from a DSP function
  • Watermarking process for DSP IP core
  • Signature encoding scheme
  • Watermark embedding process for DSP IP core
  • Didactic example of single-phase watermarking process
  • 4.3.3 Design process of triple-phase watermarked IP core/hardware
  • Signature encoding scheme
  • Watermark embedding process
  • Signature detection process
  • Didactic example of triple-phase watermarking process
  • 4.3.4 Desired properties of IP core watermark
  • 4.3.5 Possible cases of dishonest claim of IP core/hardware ownership and its resolution
  • 4.4 Analysis on case studies
  • 4.4.1 Security analysis of triple-phase watermark for DSP IP cores
  • 4.4.2 Design cost analysis of triple-phase watermark for DSP IP cores
  • 4.5 Conclusion
  • 4.6 Exercises
  • References

Inspec keywords: watermarking; industrial property; microprocessor chips

Other keywords: robust watermarking; integrated circuit protection; IP core protection; intellectual property cores; hardware cores; ownership protection

Subjects: Microprocessors and microcomputers; Legal aspects of computing; Microprocessor chips; Semiconductor integrated circuits

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