In this era of consumer electronics, cyber security is one of the key challenges. Any security, privacy, or protection methods that are deployed rely on cryptography. Advance encryption standard (AES) is one of the heavily used cryptography algorithms for its advantages. This chapter is dedicated to the process of AES and its hardware design in the form of IP core. Several hardware security techniques rely on AES IP core as an important block. Additionally, since this is such an important core, its self-protection against forgery/piracy is also crucial. Thus, this chapter will also discuss about AES IP core protection using watermarking.

Chapter Contents:

• 10.1 Introduction
• 10.2 AES algorithm
• 10.2.1 Overview of AES
• 10.2.2 AES algorithm—description and custom hardware design
• 10.2.2.1 Byte substitution (S-box) layer
• 10.2.2.2 Row-shifting diffusion layer
• 10.2.2.3 MixColumn diffusion layer
• 10.2.2.4 Key addition layer
• 10.2.2.5 Key scheduler for 128-bit AES
• 10.3 AES digital watermarking
• 10.3.1 AES watermark encoding
• 10.3.2 Process of embedding watermark in AES
• 10.3.3 Signature detection
• 10.4 Case study of a watermarked AES hardware
• 10.5 Conclusion
• 10.6 Exercises
• References

Inspec keywords: security of data; cryptography; microprocessor chips; watermarking

Other keywords: ownership protection; consumer electronics; cyber security; hardware security techniques; AES IP core protection; cryptography; hardware watermarking; advanced encryption standard

Subjects: Microprocessor chips; Security aspects of hardware; Cryptography; Microprocessors and microcomputers