Figure of merits (FoMs) for evaluating VCOs and PLLs

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Figure of merits (FoMs) for evaluating VCOs and PLLs

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Analysis and Design of CMOS Clocking Circuits for Low Phase Noise — Recommend this title to your library

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Author(s): Woorham Bae  and  Deog-Kyoon Jeong
Source: Analysis and Design of CMOS Clocking Circuits for Low Phase Noise,2020
Publication date July 2020

VCOs and PLLs have many different specifications/applications and as well have several design trade-offs, such as between the jitter, power consumption, and frequency. As a result, a figure-of-merit (FoM), which is a benchmark used to characterize the performance of a device, needs to be defmed to normalize different VCOs/PLLs performance for a fair comparison between them. Let us start with the FoM for VCO. Note that only white noise is under consideration, so we assume the phase noise is inversely proportional to the square of the offset frequency. Because it is very important to reflect the primary design trade-offs into the FoM, let us review the design trade-offs in a VCO and a PLL.

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Inspec keywords: phase locked loops; phase noise; white noise; voltage-controlled oscillators

Other keywords: offset frequency; phase noise; PLL; primary design trade-offs; FoM; white noise; VCO; figure of merits

Subjects: Modulators, demodulators, discriminators and mixers; Oscillators

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