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Design techniques to improve the resilience of computing systems: logic layer

Design techniques to improve the resilience of computing systems: logic layer

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Cross-Layer Reliability of Computing Systems — Recommend this title to your library

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High-reliability and high-dependability applications require integrated solutions against random hardware faults and transient faults. Random hardware faults or intermittent faults are generated by process or time-dependent variations, i.e., aging, while transients are induced either by radiation, namely, soft errors, or by extreme operating conditions or electronic interference. Indeed, nanometric static process variations, voltage and temperature dynamic fluctuations due to chip activity, Bias Temperature Instability caused by the stress on the transistors, and single event effects or soft errors are reported to be very important issues in nanometric technology nodes [1,2]. These phenomena induce performance reduction if not taken care properly and may reduce circuit lifetime and Mean Time To Failure. Hence, onchip accurate yield, reliability and performance monitors that check online or periodically violations of guardbands have become necessary. Adaptive compensation schemes are combined with monitors in the attempt to recover from potential error when timing violation occurs. This chapter presents up-to-date state of the art of performance and reliability monitors, insertion methodology and experimental results of different sensors and monitors used for process and environment variations as well as aging compensation.

Chapter Contents:

  • 2.1 Introduction
  • 2.2 Performance and reliability monitors
  • 2.2.1 Double-sampling methodology and the basic architecture
  • 2.2.1.1 Detection efficiency of double-sampling technique
  • 2.2.1.2 Correction of soft errors and timing faults
  • 2.2.1.3 Reliability improvement and adaptive calibration
  • 2.2.1.4 Speed increase
  • 2.2.1.5 Power reduction
  • 2.2.1.6 Failure prediction
  • 2.2.1.7 Failure prediction versus error detection
  • 2.3 Double-sampling-based monitors for detecting performance violations and transient faults
  • 2.3.1 External-design monitors
  • 2.3.2 Embedded monitors
  • 2.3.3 Other types of monitors
  • 2.3.4 Discussions
  • 2.4 Conclusions
  • References

Inspec keywords: logic circuits; radiation hardening (electronics); compensation; ageing; nanoelectronics; logic design

Other keywords: soft errors; timing violation; nanometric technology nodes; circuit lifetime; mean time to failure; adaptive compensation schemes; extreme operating conditions; reliability monitors; performance monitors; on chip accurate yield; process variations; transient faults; logic layer; guardband violation; temperature dynamic fluctuations; electronic interference; nanometric static process variations; aging compensation; integrated solutions; environment variations; time-dependent variations; single event effects; Bias Temperature Instability; random hardware faults; high-dependability applications; intermittent faults; insertion methodology; design techniques

Subjects: Radiation effects (semiconductor technology); Logic design methods; Digital circuit design, modelling and testing; Logic and switching circuits; Logic circuits

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