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Stochastic-binary convolutional neural networks with deterministic bit-streams

Stochastic-binary convolutional neural networks with deterministic bit-streams

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In this chapter, we proposed a low-cost and energy -efficient design for hardware implementation of CNNs. LD deterministic bit -streams and simple standard AND gates are used to perform fast and accurate multiplication operations in the first layer of the NN. Compared to prior random bit -stream -based designs, the proposed design achieves a lower misclassification rate for the same processing time. Evaluating LeNet5 NN with MINIST dataset as the input, the proposed design achieved the same classification rate as the conventional fixed-point binary design with 70% saving in the energy consumption of the first convolutional layer. If accepting slight inaccuracies, higher energy savings are also feasible by processing shorter bit -streams.

Chapter Contents:

  • 4.1 Overview
  • 4.2 Introduction
  • 4.3 Background
  • 4.3.1 Stochastic computing
  • 4.3.2 Deterministic low-discrepancy bit-streams
  • 4.3.3 Convolutional neural networks
  • 4.4 Related work
  • 4.5 Proposed hybrid binary-bit-stream design
  • 4.5.1 Multiplications and accumulation
  • 4.5.2 Handling negative weights
  • 4.6 Experimental results
  • 4.6.1 Performance comparison
  • 4.6.2 Cost comparison
  • 4.7 Summary
  • Acknowledgment
  • References

Inspec keywords: logic design; logic gates; convolutional neural nets; optical character recognition

Other keywords: fixed-point binary design; LD deterministic bit-streams; stochastic-binary convolutional neural networks; multiplication operations; AND gates; LeNet5 NN; MINIST dataset; CNN

Subjects: Image recognition; Logic circuits; Digital circuit design, modelling and testing; Computer vision and image processing techniques; Logic elements; Neural net devices; Logic design methods; Neural nets (circuit implementations)

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