Doping-free tunnelling transistors – technology and modelling
As device dimensions are continuously down-scaling into sub-10 nm regimes, complementary metal-oxide semiconductor technology is facing severe challenges such as increased static power consumption, poor gate controllability, enhanced short-channel effects (SCEs), random dopant fluctuations (RDFs) and process-voltage temperature (PVT) variation, hence, conventional metal-oxide-semiconductor fieldeffect transistors (MOSFETs) have failed to be a worthy candidate for nano-electronics and micro-electronics regime. Recently, the tunnel FETs (TFET) gain tremendous attention because of their low standby power consumption and scalable subthreshold swing (SS). The TFET is a gated P-I-N diode, where ON-state current would be due to band-to-band tunnelling (BTBT) instead of thermionic emission, and they exhibit very low OFF-state current of the order of fA/mm, which makes them a potential candidate for low power consumption. The heavily doped nature of TFETs causes certain problems, and to address them, the concept of dynamically configurable doping-free (DF) TFETs was recently proposed. In this chapter, a detailed analysis of dynamically configurable TFETs such as the working principle, I-Vcharacteristics, fabrication flow and the effect of process and temperature variation is presented.




Doping-free tunnelling transistors – technology and modelling, Page 1 of 2
< Previous page Next page > /docserver/preview/fulltext/books/cs/pbcs049e/PBCS049E_ch9-1.gif /docserver/preview/fulltext/books/cs/pbcs049e/PBCS049E_ch9-2.gif