CNT and SiNW modeling for dual-gate ambipolar logic circuit design

CNT and SiNW modeling for dual-gate ambipolar logic circuit design

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The book chapter surveys available FED models and analyzes the utility of these device models for ambipolar logic circuit design to enable the reader to determine which model is best suited for a particular application. The models have been grouped according to their underlying approaches and their ability to perform the desired model characteristics. Where the group names do not specify otherwise, these groups are static with fixed drain and source nodes.

Chapter Contents:

  • 8.1 Desired model characteristics
  • 8.1.1 Connection to underlying physics
  • 8.1.2 Experimental matching
  • 8.1.3 SPICE compatibility
  • 8.1.4 PG modulation
  • 8.1.5 Dynamic polarity switching (interchangeability)
  • 8.2 Single-gate physically derived models
  • 8.2.1 Unipolar SPICE model for ballistic CNTFETs
  • 8.2.2 Unipolar Verilog-A model for doped CNTFETs
  • 8.2.3 Ambipolar VHDL-AMS model for CNTFETs
  • 8.2.4 Experimental matching
  • 8.2.5 Connection to underlying physics
  • 8.2.6 SPICE compatibility
  • 8.2.7 PG modulation
  • 8.2.8 Dynamic polarity switching (interchangeability)
  • 8.3 Behavioral ambipolar models
  • 8.3.1 Ambipolar model for double-independent-gate Fin FETs
  • 8.3.2 Ambipolar Verilog-A model for CNTFETs
  • 8.3.3 Connection to underlying physics
  • 8.3.4 Experimental matching
  • 8.3.5 SPICE compatibility
  • 8.3.6 PG modulation
  • 8.3.7 Dynamic polarity switching (interchangeability)
  • 8.4 Comprehensive semiconductor compensation simulation
  • 8.4.1 Ambipolar TCAD simulation for WSe2FETs
  • 8.4.2 Ambipolar TCAD simulation for SiNWFETs
  • 8.4.3 Connection to underlying physics
  • 8.4.4 Experimental matching
  • 8.4.5 SPICE compatibility
  • 8.4.6 PG modulation
  • 8.4.7 Dynamic polarity switching (interchangeability)
  • 8.5 Physical ambipolar models
  • 8.5.1 MATLAB model for multiple-independent-gate FETs
  • 8.5.2 Ambipolar VHDL-AMS model with binary PG for CNTFETs
  • 8.5.3 Ambipolar Verilog-A model for CNTFETs
  • 8.5.4 Ambipolar model for SiNWFETs
  • 8.5.5 Connection to underlying physics
  • 8.5.6 Experimental matching
  • 8.5.7 SPICE compatibility
  • 8.5.8 PG modulation
  • 8.5.9 Dynamic polarity switching (interchangeability)
  • 8.6 Ambipolar models with dynamic polarity
  • 8.6.1 Dynamic Verilog-A model with fixed source and drain for CNTFETs
  • 8.6.2 Dynamic Verilog-A model with source-drain interchangeability for CNTFETs
  • 8.6.3 Connection to underlying physics
  • 8.6.4 Experimental matching
  • 8.6.5 SPICE compatibility
  • 8.6.6 PG modulation
  • 8.6.7 Dynamic polarity switching (interchangeability)
  • 8.7 Summary
  • References

Inspec keywords: elemental semiconductors; integrated circuit modelling; carbon nanotube field effect transistors; nanowires; semiconductor quantum wires; silicon; integrated circuit design; quantum well devices; logic design; semiconductor device models

Other keywords: functionality-enhanced devices; fixed drain nodes; silicon nanowire field-effect transistors; dual-gate ambipolar logic circuit design; modeling; ambipolar carbon nanotube field-effect transistors; SiNW; CNTFETs; FED models; SiNWFETs; Si; fixed source nodes; CNT; C

Subjects: Fullerene, nanotube and related devices; Nanometre-scale semiconductor fabrication technology; Other field effect devices; Semiconductor integrated circuit design, layout, modelling and testing; Semiconductor device modelling, equivalent circuits, design and testing

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