This chapter presents various designs of memristor-based adders. IMPLY, hybridCMOS, threshold gate, and MAD approaches are employed to implement ripplecarry, carry-select, conditional-sum, and carry-lookahead adders. Each design is described and analyzed in terms of complexity and delay. Completed schematics are also given.

Chapter Contents:

• 6.1 Ripple Carry Adders
• 6.1.1 IMPLY ripple-carry adder
• 6.1.1.1 Baseline IMPLY full adder
• 6.1.1.2 Optimizing the critical path
• 6.1.1.3 Optimized IMPLY ripple-carry adder
• 6.1.1.4 Pipelining
• 6.1.2 Hybrid-CMOS ripple-carry adder
• 6.1.2.1 Optimized hybrid-CMOS ripple-carry adder
• 6.1.3 Threshold gate ripple-carry adder
• 6.1.3.1 Ripple-carry adder with GOTO pairs
• 6.1.3.2 Ripple-carry adder with CSTG gates
• 6.1.3.3 Ripple-carry adder schematic
• 6.1.4 MAD gate ripple-carry adder
• 6.1.4.1 Baseline MAD full adder
• 6.1.4.2 Optimized MAD full adder
• 6.1.4.3 Baseline MAD ripple-carry adder
• 6.1.4.4 Optimized MAD ripple-carry adder
• 6.1.4.5 Pipelining
• 6.1.4.6 Translation into a crossbar
• 6.1.5 Ripple-carry adder analysis and comparison
• 6.2 Carry Lookahead adders
• 6.2.1 IMPLY carry-lookahead adder
• 6.2.1.1 Multiset IMPLY operation
• 6.2.1.2 Group propagate and group generate production
• 6.2.1.3 Sum and carry-out production
• 6.2.1.4 16-bit logic
• 6.2.1.5 Pipelining and ordering optimizations
• 6.2.2 Hybrid-CMOS carry-lookahead adder
• 6.2.3 Threshold gate carry-lookahead adder
• 6.2.3.1 Gate expressions per block
• 6.2.3.2 16-bit logic block
• 6.2.4 MAD gate carry-lookahead adder
• 6.2.4.1 Group signal optimizations
• 6.2.4.2 Carry-signal optimizations
• 6.2.4.3 16-bit logic block
• 6.2.5 Carry-lookahead adder analysis and comparison
• 6.3 Carry-select adders
• 6.3.1 IMPLY carry-select adder
• 6.3.1.1 IMPLY multiplexer design
• 6.3.1.2 Selecting design parameters
• 6.3.1.3 Pipelining
• 6.3.2 Hybrid-CMOS carry-select adder
• 6.3.3 Threshold gate carry-select adder
• 6.3.3.1 GOTO implementation
• 6.3.3.2 CSTG implementation
• 6.3.4 MAD gate carry-select adder
• 6.3.4.1 Pipelining
• 6.3.5 Carry-select adder analysis and comparison
• 6.4 Conditional-sum adders
• 6.4.1 IMPLY conditional-sum adder
• 6.4.1.1 Optimizations to reduce copy operations
• 6.4.1.2 Pipelining
• 6.4.2 Hybrid-CMOS conditional-sum adder
• 6.4.3 Threshold gate conditional-sum adder
• 6.4.4 MAD gate conditional-sum adder
• 6.4.5 Conditional-sum adder analysis and comparison

Inspec keywords: memristors; circuit complexity; adders; CMOS logic circuits

Other keywords: carry-lookahead adder; hybrid CMOS approach; MAD approach; carry-select adder; ripple carry adder; memristor-based adder design; IMPLY; conditional-sum adder; threshold gate approach

Subjects: CMOS integrated circuits; Logic and switching circuits; Logic circuits; Resistors