Nanoscale FinFET devices for PVT-aware SRAM

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Nanoscale FinFET devices for PVT-aware SRAM

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Author(s): G. K. Sharma 1 ; Manisha Pattanaik 1 ; Nandakishor Yadav 1
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Source: Nano-CMOS and Post-CMOS Electronics: Circuits and Design,2016
Publication date April 2016

This chapter describes nanoscale FinFET devices and their application in SRAM design. It also discusses variability of nanoscale integrated circuits (ICs) and introduces variability-aware memory design. In the previous two chapters, process variations were discussed for analog and digital ICs. However, this chapter focuses on futuristic memory design. A comprehensive variability including process, voltage and temperature (PVT) variations has been discussed for future SRAM design. After analysing the results of PVT-aware designs, it is found that sensitivity-driven IG-FinFET-based SRAM is the most suitable technique for reliable and high-density memories. The design of SRAM using a post-CMOS device, namely FinFET widely adopted in semiconductor industry has been specifically elaborated.

Chapter Contents:

  • 3.1 Introduction
  • 3.2 Nanoscale FinFET devices
  • 3.2.1. Bulk FinFET
  • 3.2.2. SOI FinFET
  • 3.2.2.1 Shorted-gate FinFET (SG-FinFET)
  • 3.2.2.2 Omega-gate FinFET (Ω-gate FinFET)
  • 3.2.2.3 Independent-gate FinFET (IG-FinFET)
  • 3.3 FinFET-based SRAM topologies
  • 3.3.1. IG-FinFET-based 6T SRAM
  • 3.3.1.1 Read and write operation
  • 3.3.1.2 SRAM cell design
  • 3.3.2. Back-gate bias IG-FinFET-based 6T SRAM
  • 3.3.3. IG-FinFET-based PPN 10T SRAM
  • 3.3.3.1 Back-gate bias PPN 10T SRAM
  • 3.3.3.2 Cross-coupled back-gate bias PPN 10T SRAM
  • 3.3.3.3 Hybrid back-gate bias PPN 10T SRAM
  • 3.3.4. Stability analysis
  • 3.4 FinFET-based SRAM design challenges
  • 3.5 PVT-aware SRAM design
  • 3.5.1 PVT mitigation techniques
  • 3.5.1.1 Static mitigation techniques
  • 3.5.1.2 Dynamic mitigation techniques
  • 3.5.2 PVT-aware SRAM designs
  • 3.5.2.1 NBL-driven design
  • 3.5.2.2 Leakage-driven design
  • 3.5.2.3 Sensitivity-driven design
  • 3.5.3 Stability analysis
  • 3.6 Conclusion
  • References

Inspec keywords: integrated circuit design; MOSFET circuits; nanoelectronics; SRAM chips

Other keywords: nanoscale integrated circuits; semiconductor industry; PVT-aware SRAM design; analog ICs; nanoscale FinFET devices; ICs; variability-aware memory design; sensitivity-driven IG-FinFET-based SRAM; digital ICs; post-CMOS device; process-voltage and temperature variations

Subjects: Memory circuits; Semiconductor storage; Semiconductor integrated circuit design, layout, modelling and testing

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