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Device physics, modeling, and technology for nano-scaled semiconductor devices

Device physics, modeling, and technology for nano-scaled semiconductor devices

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This chapter introduces the device physics, modeling, and technology for the different silicon-based device structures. Quantum-mechanical treatment for the device physics is done as well as the different and alternative approaches for advanced device simulation. The last section takes over the potential use that can be given to new materials and device structures. A preliminary set of applications are reviewed, such as Si-based materials with nanostructured properties, amorphous SiGe alloys applications such as thermal and photodetector sensors. Furthermore, the possibility to make use of CMOS fabrication steps for 3D Si die stacking is also reviewed.

Chapter Contents:

  • 2.1 Bulk MOSFETs and related device structures
  • 2.1.1 Conventional field-effect transistor (FET) physics and limitations
  • 2.1.2 Alternative FET-related structures on silicon bulk and other materials
  • 2.2 Advanced FET-related devices
  • 2.2.1 Introduction
  • 2.2.2 Silicon-on-insultator FET technology
  • 2.2.2.1 Partially depleted SOI MOSFETs
  • 2.2.2.2 Fully depleted SOI transistor
  • 2.2.3 Ultra-thin FDSOI MOSFETs
  • 2.2.3.1 Electron distribution and quantum effects
  • 2.2.3.2 Electron mobility in ultra-thin FDSOI transistors
  • 2.2.3.3 Ultra-thin BOX
  • 2.2.3.4 Multi-V T ultra-thin body and buried oxide FDSOI platform
  • 2.2.4 Double-gate and FinFETs
  • 2.2.4.1 Fabrication technology for multigate transistors
  • 2.2.4.2 Multigate transistors and short channel effects
  • 2.2.4.3 Corner effects
  • 2.2.4.4 Bulk FinFETs
  • 2.2.4.5 Quantum effects in quantum-well-based multigate transistors
  • 2.2.4.6 Electron mobility in quantum-well-based transistors
  • 2.2.5 Silicon multigate nanowires
  • 2.2.5.1 Quantum effects in Si nanowires
  • 2.2.5.2 Electron transport in Si nanowires
  • 2.2.6 Junctionless transistors
  • 2.2.7 Tunnel field-effect transistor
  • 2.2.7.1 Structure and operation
  • 2.2.7.2 Operating regimes of the TFET
  • 2.3 Different approaches for semiconductor device modeling and simulation
  • 2.3.1 TCAD tools: technological motivation and general outlook
  • 2.3.2 Drift-diffusion transport model
  • 2.3.3 Semi-classical transport and higher moments transport models
  • 2.3.3.1 Deterministic solution of the Boltzmann transport equation
  • 2.3.3.2 Monte Carlo methods for the Boltzmann equation solution
  • 2.3.4 Stress- and orientation-dependent mobility in silicon
  • 2.3.5 Mobility in ultra-thin body of strained SOI transistors
  • 2.3.5.1 Spin lifetime enhancement in strained silicon films
  • 2.3.6 Quantum and quantum-corrected transport models
  • 2.4 Alternative materials and device structures
  • 2.4.1 Introduction
  • 2.4.2 Nanostructured materials, amorphous and SiGe alloys, and its applications
  • 2.4.3 Photodetectors and micro-machined bolometers
  • 2.4.4 CMOS process-compatible silicon-in-package (SiP)
  • 2.5 Conclusions
  • Acknowledgments
  • References

Inspec keywords: semiconductor device models; silicon; CMOS integrated circuits; nanostructured materials; Ge-Si alloys; temperature sensors; nanoelectronics; photodetectors; amorphous semiconductors

Other keywords: photodetector sensors; 3D Si die stacking; thermal sensors; amorphous SiGe alloys applications; device modeling; silicon-based device structures; CMOS fabrication; quantum-mechanical treatment; device simulation; nanostructured properties; device physics; nanoscaled semiconductor devices

Subjects: CMOS integrated circuits; Nanometre-scale semiconductor fabrication technology; Semiconductor device modelling, equivalent circuits, design and testing; Photodetectors; Thermal variables measurement

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