Inspec keywords: fault tolerance; embedded systems; graph theory; field programmable gate arrays

Other keywords: reliability exposures; reconfigurable hardware devices; enhanced timing improvement; field programmable gate array toolchain; leveraging design diversity; time-to-market; combined variations; diverse implementations; modular redundancy methods; uncertain parametric variations; commercial-grade Xilinx field programmable gate array platform; target device; increased design complexity; performance variation impact; process variation; graph theory; pre-emptive design approach; fault resolution space; distinct physical implementations; largest solution space feasible; process parameters; relentless scaling; reconfiguration-based resilience; integrated circuits; cost-competitive manufacturability; dynamic reconfiguration time; reliability degradation; interconnect routing constraints; union-free hypergraphs; optimal designs; pervasive computing; reliability concerns

Subjects: Combinatorial mathematics; Combinatorial mathematics; Logic and switching circuits; Logic circuits