Inspec keywords: flip-flops; MOSFET; field programmable gate arrays

Other keywords: intrinsic stochastic variability; integrated circuit emphasis; hardware VLSI prototype; gold standard simulations; transistor level configuration options; next-generation FPGA architecture; post-fabrication transistor-level optimisation; simulation program; operating point; field programmable gate array; multireconfigurable architecture; gate level; virtual prototype; digital array architecture; prefabrication verification; D-type flip-flop timing characteristics; programmable analogue architecture; statistically enhanced high performance metal gate MOSFET compact models; design optimisation case study; technology process; size 25 nm

Subjects: Logic and switching circuits; Logic circuits; Insulated gate field effect transistors