IEE Proceedings - Computers and Digital Techniques

Volume 141, Issue 6, November 1994

Volume 141, Issue 6

November 1994

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    • Division unit with Newton-Raphson approximation and digit-by-digit refinement of the quotient
      Multi-exponentiation (cryptographic protocols)
      Parallel design of arithmetic coding
      Constant-division algorithms
      Performance of scheduling algorithms for channel reservation
      Stride: a tool for formal interactive system synthesis
      Concurrent-error detection in high-speed carry-free dividers
      KGPMAP:library-based technology-mapping technique for antifuse based FPGAs
      Minimisation of fixed-polarity AND/XOR canonical networks
      Radix digit-serial pipelined divider/square-root architecture
      VLSI structures for bit-serial modular multiplication using basis conversion
      Implementation of dynamic look-up tables
      Guiding instruction scheduling with synchronisation markers on a superscalar based multiprocessor
      Petri-net-based algorithms for parallel-controller synthesis
      General area router based on planning techniques

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