IET Software
Online ISSN 1751-8814
IET Software publishes papers on all aspects of the software lifecycle, including design, development, implementation and maintenance. The focus of the journal is on the methods used to develop and maintain software, and their practical application.
This publication was previously known as IEE Proceedings - Software 1997-2006. ISSN 1462-5970. more..
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Conflict resolution support for parallel software development
- Author(s): Nan Niu; Fangbo Yang; Jing-Ru C. Cheng; Sandeep Reddivari
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p.
1
–11
(11)
Parallel changes, in which separate lines of development are carried out by different developments, are a basic fact of developing and maintaining large-scale software systems. Merging parallel versions and variants of source code is a common and essential software engineering activity. When a non-trivial number of conflicts is detected, there is a need to support the maintainer in investigating and resolving these conflicts. In this study, the authors present software conflict resolution recommender (scoreRec), a cost–benefit approach to ranking the conflicting software entities. The contributions of scoreRec lie in the leverage of both structural and semantic information of the source code to generate conflict resolution recommendations, as well as the hierarchical presentation of the recommendations with detailed explanations. The authors evaluate scoreRec through an industrial-strength legacy system developed by computational scientists. The results show that scoreRec offers relevant and insightful information and sound engineering support for conflict resolution. The authors' work also sheds light on the future development of recommendation systems in the context of software merging.
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Automatic code generation from unified modelling language sequence diagrams
- Author(s): Debasish Kundu; Debasis Samanta; Rajib Mall
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p.
12
–28
(17)
Unified modelling language (UML) is a visual modelling language, which has gained popularity among software practitioners. In a model-driven software development environment, the existing UML tools mainly support automatic generation of structural code from UML class diagrams. However, the code generation from UML diagrams such as statechart, activity, collaboration and sequence diagrams (SDs) are not supported by most UML tools and also have scarcely been reported in the literatures. This work proposes an approach to automatic generation of code from UML 2.x SDs of use cases. From the XML metadata interchange (XMI) representation of an SD of a use case, the authors construct a graph model called sequence integration graph (SIG). The SIG encapsulates information related to messages, control flow and method scope of interactions. These information are then used to generate code. The proposed approach has been tested using a number of real-life application systems and the results substantiate the efficacy of the approach to synthesise the code for controller classes. The authors observe that approximately 48% of the total lines of code within controller class methods can be generated with the proposed approach. The proposed approach can be easily extended to other behavioural UML models such as interaction-overview diagrams, communication diagrams and activity diagrams.
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Risk analysis: a guiding force in the improvement of testing
- Author(s): Mitrabinda Ray; Durga Prasad Mohapatra
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p.
29
–46
(18)
The authors propose a state-based risk assessment methodology at the analysis and design stage of Software Development Life Cycle. First, a method is proposed to estimate the risk for various states of a component within a scenario and then, the risk for the whole scenario is estimated. The key data needed for risk assessment are complexity and severity. An Inter-Component State-Dependence Graph is introduced to estimate the complexity for a state of a component within a system. The severity for a component within a scenario is decided based on three hazard techniques: Functional Failure Analysis, Software Failure Mode and Effect Analysis and Software Fault Tree Analysis. The risk for a scenario is estimated based on the risk of interacting components in various states within the scenario and State COllaboration TEst Model of the scenario. Finally, the system risk is estimated based on two inputs: scenarios risks and Interaction Overview Diagram of the system. The methodology is applied on a Library Management System case study. An experimental comparative analysis is performed and observed that the testing team guided by our state-based risk assessment approach achieves high test efficiency compared with it with an existing component-based risk assessment approach.
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Tailoring a large-sized software process using process slicing and case-based reasoning technique
- Author(s): Seung-Hun Park; Doo-Hwan Bae
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p.
47
–55
(9)
As the process tailoring is an inevitable and costly activity in software development projects, it is important to reduce the effort for process tailoring. It is critical to a large-sized software process. A large-sized software process usually contains hundreds of elements and relationships between the elements. Manually identifying the elements to be tailored is laborious and error-prone. To overcome this problem, the authors proposed an approach to process tailoring using process slicing (PS) in a large-sized software process. PS operates on a software process that includes various sub-processes and utilises past experience by case-based reasoning (CBR) technique to increase its effectiveness. The authors validated that PS can help a project manager to identify the elements to be tailored with less effort. It has also been illustrated that the CBR technique is helpful in reducing errors and increasing the performance of PS.
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On-chip support for software verification and debug in multi-core embedded systems
- Author(s): Padraig Fogarty; Ciaran MacNamee; Donal Heffernan
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p.
56
–64
(9)
The challenges in silicon testing and debug of complex integrated circuits are well understood. Where these circuits include multiple processor cores there is also a dramatic increase in the complexity of verifying and debugging the associated software; with much of this complexity being because of the inherent lack of visibility over internal signals which integration brings. The trend to-date has been to rely upon silicon test interfaces to provide access to internal signals required for software verification and debug. However, it is questionable whether this is sufficient for real-time systems or future designs with increasing processor cores. This study examines the on-chip technology supporting software verification and debug in current designs and proposes enhancements in this area. As much of this technology is primarily intended for silicon test it is lacking in terms of I/O bandwidth, which is a significant limitation for software verification and debug. The authors propose their alternative approach of using an on-chip coprocessor and debug circuitry to address this principal limitation; and describe an embedded application where this approach was successfully applied to monitor timing requirements and detect failures. The authors also outline how this approach could be applied as an architectural solution for formal runtime verification.
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Increasing the accuracy of software development effort estimation using projects clustering
- Author(s): V. Khatibi Bardsiri; D.N.A. Jawawi; S.Z.M. Hashim; E. Khatibi
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p.
461
–473
(13)
Software development effort is one of the most important metrics that must be correctly estimated in software projects. Analogy-based estimation (ABE) and artificial neural networks (ANN) are the most popular methods used widely in this field. These methods suffer from inconsistent and irrelevant projects that exist in the software project datasets. In this paper, a new hybrid method is proposed to increase the accuracy of development effort estimation based on the combination of fuzzy clustering, ABE and ANN methods. In the proposed method, the effect of irrelevant and inconsistent projects on estimates is decreased by designing a new framework, in which all the projects are clustered. The quality of training in ANN and the consistency of historical data in ABE are improved using the proposed framework. Two large and real datasets are utilised in order to evaluate the performance of the proposed method and the obtained results are compared to eight other estimation methods. The promising results showed that the proposed method outperformed the other methods on both datasets. The performance metrics of mean magnitude of relative error (MMRE) and the percentage of the prediction (PRED) (0.25) have been improved by average of 51 and 127% in the first dataset, as well as 52 and 94% in the second dataset.
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Investigations on implementation of web applications with different techniques
- Author(s): M. Kalita; T. Bezboruah
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p.
474
–478
(5)
Investigations on implementation of web application with different techniques are essential for developers’ as well as users’ perspective. As such, the authors propose to investigate the same by implementing two prototype research web applications based on two different implementation techniques. One of the web applications has been implemented based on the Microsoft .NET technique and the other based on the Java technique. Our objective is to carry out a detailed comparative study of both the techniques in terms of efficiency, reliability, performance, scalability, stability and time to market features of both the techniques. Load and stress testing are performed for both the web applications using Mercury LoadRunner. The statistical analysis of recorded data for both the applications is carried out to study the feasibility of the work. In this study, the authors present in detail the results of the authors’ comparative study on the two techniques.
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Artificial neural network-based metric selection for software fault-prone prediction model
- Author(s): C. Jin; S.-W. Jin; J.-M. Ye
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p.
479
–487
(9)
The identification of a module's fault-proneness is very important for minimising cost and improving the effectiveness of the software development process. How to obtain the relation between software metrics and a module's fault-proneness has been the focus of much research. One technical challenge to obtain this relation is that there is relevance between software metrics. To overcome this problem, the authors propose a reduction dimensionality phase, which can be generally implemented in any software fault-prone prediction model. In this study, the authors present applications of artificial neural network (ANN) and support vector machine in software fault-prone prediction using metrics. A new evaluation function for computing the contribution of each metric is also proposed in order to adapt to the characteristics of software data. The vital characteristic of this approach is the automatic determination of ANN architecture during metrics selection. Four software datasets are used for evaluating the performance of the proposed model. The experimental results show that the proposed model can establish the relation between software metrics and modules’ fault-proneness. Moreover, it is also very simple because its implementation requires neither extra cost nor expert's knowledge. The proposed model has good performance, and can provide software project managers with trustworthy indicators of fault prone components.
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Supporting program comprehension in large preprocessor-based software product lines
- Author(s): J. Feigenspan; M. Schulze; M. Papendieck; C. Kästner; R. Dachselt; V. Köppen; M. Frisch; G. Saake
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p.
488
–501
(14)
Software product line (SPL) engineering provides an effective mechanism to implement variable software. However, using preprocessors to realise variability, which is typical in industry, is heavily criticised, because it often leads to obfuscated code. Using background colours to highlight code annotated with preprocessor statements to support comprehensibility has proved to be effective, however, scalability to large SPLs is questionable. The authors’ aim is to implement and evaluate scalable usage of background colours for industrial-sized SPLs. They designed and implemented scalable concepts in a tool called FeatureCommander. To evaluate its effectiveness, the authors conducted a controlled experiment with a large real-world SPL with over 99 000 lines of code and 340 features. They used a within-subjects design with treatment colours and no colours. They compared correctness and response time of tasks for both treatments. For certain kinds of tasks, background colours improve program comprehension. Furthermore, the subjects generally favour background colours compared with no background colours. In addition, the subjects who worked with background colours had to use the search functions less frequently. The authors show that background colours can improve program comprehension in large SPLs. Based on these encouraging results, they continue their work on improving program comprehension in large SPLs.
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Systematic literature review: teaching novices programming using robots
- Author(s): L. Major; T. Kyriacou; O.P. Brereton
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p.
502
–513
(12)
Teaching programming to novices is a difficult task due to the complex nature of the subject, the negative stereotypes are associated with programming and because introductory programming courses often fail to encourage student understanding. This study investigates the effectiveness of using robots as tools in the teaching of introductory programming and to determine whether such technology can help to overcome the current barriers for learners in this context. The systematic literature review (SLR) methodology is used to address this aim. Nine electronic databases, the proceedings from six conferences and two journals were searched for relevant literature and exclusion criteria, and after performing several validation exercises, in total, 75% of included papers report that robots are an effective teaching tool and can help novice programmers in their studies. Most of these papers focus on the use of physical robots, however, and further research is needed to assess the effectiveness of using simulated robots.

