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Online ISSN 1751-861X Print ISSN 1751-8601

IET Computers & Digital Techniques

Volume 12, Issue 4, July 2018

Volume 12, Issue 4

July 2018

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    • Hybrid spin-CMOS stochastic spiking neuron for high-speed emulation of In vivo neuron dynamics
      On-chip communication for neuro-glia networks
      Role of circuit representation in evolutionary design of energy-efficient approximate circuits
    • Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array
      Unified multi-objective mapping for network-on-chip using genetic-based hyper-heuristic algorithms
      Improved circuit synthesis approach for exclusive-sum-of-product-based reversible circuits
      Test data compression using hierarchical block merging technique

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