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Online ISSN 1751-8598 Print ISSN 1751-858X

IET Circuits, Devices & Systems

Volume 4, Issue 1, January 2010


Volume 4, Issue 1

January 2010

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    • 1.2-V, 10-bit, 60–360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18 µm CMOS with minimised supply headroom
      A memory-free modified discrete cosine transform architecture for MPEG-2/4 AAC
      V-band variable gain amplifier applying efficient design methodology with scalable transmission lines
      Reduced complexity analogue-to-residue conversion employing folding number system
      High-performance simulator for digital audio class D amplifiers
      Filterless class D amplifiers: power-efficiency and power dissipation
      Switched positive/negative charge pump design using standard CMOS transistors
      Geometric centre tracking of tagged objects using a low power demodulation smart vision sensor
      Current and voltage transfer function filters using a single active device

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