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Online ISSN 1751-8598 Print ISSN 1751-858X

IET Circuits, Devices & Systems

Volume 2, Issue 2, April 2008


Volume 2, Issue 2

April 2008

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    • Double-least-significant-bits 2's-complement number representation scheme with bitwise complementation and symmetric range
      Fast and accurate statistical static timing analysis with skewed process parameter variation
      Practical voltage/current-controlled grounded resistor with dynamic range extension
      Accurate model for single-photon avalanche diodes
      Mechanisms of spontaneous recovery in DC gate bias stressed power VDMOSFETs
      CMOS voltage reference with multiple outputs
      Design methodology of Miller frequency compensation with current buffer/amplifier
      High output impedance current-mode all-pass sections with two grounded passive components
      Dual-mode design of fully differential circuits using fully balanced operational amplifiers
      General method for phase-locked loop filter analysis and design
      0.9 V low-power switched-opamp switched-capacitor bandpass filter for electroneurography acquisition systems
      Assessment of the error in the average current sensed by the unidirectional current pulse transformer
      Bulk-silicon power integrated circuit technology for 192-channel data driver ICs of plasma display panel
      Low-power high‐speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices

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