A novel substrate integrated waveguide (SIW) cavity-backed self-triplexing slot antenna, consisting of a hybrid SIW cavity resonator is proposed for tri-frequency operation. The hybrid cavity resonator is an amalgamation of a half-mode circular and half-mode rectangular SIW cavity resonator. A radiating slot is etched on its top surface, which produces three distinct resonant frequencies (5.57, 7.17 and 7.65 GHz) when it is excited by three microstrip lines. The lower band around 5.57 GHz is achieved due to a half-mode circular cavity resonator, when the corresponding microstrip line is excited. On the other hand, remaining two bands around 7.17 and 7.65 GHz are achieved due to half-mode rectangular cavity resonator when excited by the corresponding microstrip lines. The experimental isolation level between any two feed lines is better than 20 dB, which helps to introduce the self-triplexing phenomenon. Moreover, the proposed design is realised on a single-layered copper-laminated dielectric substrate, maintaining planar configuration.

A compact 2 × 2 ultra wideband (UWB) antenna array, composed of four planar rectangular monopoles, with a novel feeding network scheme is presented. The feeding network contains a power divider with a wideband balun and a 180° phase inverter in order to add the radiated electric fields of the array elements in-phase. A partial ground plane is used to achieve ultra wide bandwidth. The antenna array has a measured impedance bandwidth from 2.5 to 5.5 GHz with broadside radiation pattern and a measured peak gain of 13 dBi. The proposed array is suitable for portable UWB systems.

A broadband dual-polarised antenna for 2G/3G/LTE/5G wireless communication is proposed. A new resonant mode is induced with parasitic resonator loaded inside the loop radiator. Wide impedance bandwidth of 72.2% for VSWR<2 (1.69–3.6 GHz) is achieved with three controllable resonant modes. Stable gain and radiation patterns are obtained over the whole band.

A 28 GHz T/R integrated circuit (IC) using common-leg circuit in 65 nm CMOS technology is presented. The proposed common-leg T/R IC is composed of single pole double throw (SPDT) and double pole double throw (DBDT) switches, 5-bit phase shifter, and 5-bit attenuator, uni-directional amplifiers for the transmit and receive modes. The measured gains for the transmit and receive modes are 3.5 and 1 dB at 26–30 GHz, respectively. The design provides full phase control range of 360° with least significant bit (LSB) of 11.25°, and attenuation control range of 23 dB with LSB of 1 dB. The proposed common-leg T/R IC has the maximum RMS phase error of 7°, and amplitude error of 0.6 dB at 26–30 GHz. The saturated output power for the transmit mode is 0 dBm, and the input P1dB for the receive mode is −20 dBm at 28 GHz. The chip core size is 1.3 × 0.8 mm². The DC current is 130 mA for the transmit mode and 98 mA for the receive mode at 2.5 V supply voltage.

A masked advanced encryption standard (AES) physical unclonable function (PUF) architecture is proposed for hardware authentication against hybrid side-channel (SCA) and machine-learning attacks (MLAs). The random mismatches of the load capacitance of the masked substitution-boxes in the AES cryptographic circuit induced by the fabrication process are utilised for generating the critical-authentication data against SCAs. Moreover, a mask data is added to the input challenge data to mask the actual input data of the proposed PUF against MLAs. As demonstrated in the results, the masked AES PUF proposed shows a nearly 51.1% uniformity, 50.7% inter-Hamming distance, and 98.1% reliability. Furthermore, if a hybrid SCA/MLA is performed on the proposed PUF by combining the corresponding side-channel leakage with the deep neural network algorithm, the prediction rate of the output responses of the masked AES PUF is only 55.2% after 100,000 number of challenge-to-response pairs are used for training.

A micropower telescopic cascode opamp is described. It employs an adaptive bias current source to obtain class-AB operation and dynamic biasing of the cascode transistors to improve output swing and common-mode rejection ratio (CMRR), and to avoid slew rate degradation. Measurement results for a 0.5 μm CMOS test chip prototype validate the proposal.

An accurate approximation of base-2 logarithm (log₂) in hardware can be used to simplify many complex calculations such as power and division. There are several existing low error approximations of log₂, but those approaches are either slow or require a lot of memory. In this letter, the authors propose a new shift and add-based approximation of log₂ using Maclaurin series. Experimental results show that with the proposed method maximum error is as less as 0.0102 and average error is reduced to 0.0050. Being independent of a number of bits this approximation can be used for any range of numbers. Results of hardware implementation show that area, power, and frequency of the proposed method are comparable with the existing methods.

An efficient 2D locally one-dimensional finite-difference time-domain (LOD-FDTD) method in lossy material is presented in this Letter. The weighted factor and scaling factors of the isotropic dispersion FDTD method are reformed for the LOD-FDTD method in lossy media. Compared with the conventional LOD-FDTD method, the relative attenuation and phase errors of the proposed method are significantly reduced. The numerical anisotropy is also greatly improved by using the proposed method.

Image steganography hides secret information in the cover images so naturally that the existence of hidden data in the stego-image is not recognisable. This Letter proposes a new approach to blind decoding of image steganography using the local entropy distributions of decoded images. The local entropy distributions of incorrectly decoded images are different from those of normal ones because of the abnormal image structures in the erroneously decoded images. This blind decoding in the image steganography is very useful to extract hidden image information because there are enormous least significant bit (LSB)-based steganography methods, and it is very hard to find the methods by observing manipulated LSBs.

Different from the traditional kernel classifiers that map the original data into high-dimensional kernel space, a novel classifier that projects Gabor features of the hyperspectral image into the kernel induced space through composite kernel technique is presented. The proposed method can not only improve the flexibility of the exploitation of spatial information but also successfully apply the kernel technique from a very different perspective to strengthen the discriminative ability. Experiments on the Indian Pines dataset demonstrate the superiority of the proposed method.

A novel memory-improved proportionate affine projection sign algorithm with correntropy induced metric (CIM-MIP-APSA) is proposed to enhance the filtering performance for sparse system identification. Furthermore, a simplified implementation of the CIM-MIP-APSA (SCIM-MIP-APSA) with low computational complexity is proposed while improving the convergence performance and filtering accuracy. Simulation results demonstrate that the CIM-MIP-APSA and SCIM-MIP-APSA algorithms outperform the existing works for sparse system identification.

As one of the crucial elements of microwave (MW) atomic clocks, Ramsey MW cavities are crucial for assisting MW–atom interactions. A dual-mode Ramsey cavity for a dual Rb/Cs atomic clock with simultaneous resonances at 6.83 and 9.19 GHz is presented here. The reported cavity, with its high mechanical strength and stability, can excite clock transitions in Rb and Cs atoms in the same zones, thereby providing a compact physical package for a dual Rb/Cs clock. Since both atoms are in the same MW–atom interaction environment, this measurement platform allows for high-accuracy comparisons.

A 69–92 GHz wideband low-noise amplifier (LNA) in a 90-nm CMOS process is presented. A transformer-based shunt-series feedback is designed to achieve a broad input matching and minimum noise figure (NF) simultaneously. Interstage matching is achieved by the on-chip transformer. The proposed four-stage common-source LNA achieves a wide 3-dB bandwidth of 23 GHz, a peak gain of 7.6 dB at 76 GHz, a minimum NF of 6.6 dB at 80 GHz, and an input 1-dB compression point of −7 dBm. The circuit occupies an area of 0.675 × 0.87 mm² and consumes 11.3 mW under a 1.2 V supply.

L-section matching circuits are used for various applications. Such circuits can be advanced to provide notch responses to suppress undesired spurious signals. The design guide that allows integration of notch responses in the L-section matching circuits is presented. With given impedance at the targeted matching frequency and notch frequencies, a matching circuit with the spurious signal suppressing notches can be simply designed based on the closed-form equations provided. A composite lowpass filter (LPF) based on the image parameter method is composed of two matching sections and two filter sections. Replacing conventional matching sections with the proposed L-section matching circuits, an LPF with spurious signal notches can be realised. The proposed matching circuit and filter with spurious suppression notches will bring an added dimension of design freedom for modern communication systems that demand stringent out-of-band requirements.

The achievement of single-channel 100 Gbit/s transmission, using linear unitravelling carrier photodiodes and QAM-16 modulation format is reported. The wireless link has been done in the indoor case, considering the recent frequency standardised 300 GHz bands.

Asynchronous optical sampling terahertz time-domain spectroscopy using semiconductor laser-based ultra-short pulse sources is demonstrated. A pair of hybridly mode-locked edge-emitting external cavity lasers operating at a wavelength of 830 nm is used. Terahertz traces with spectral components over a range of 250 GHz are achieved.

Dual single-photon avalanche photodiodes (SPADs) integrated on the same chip enable the effective compensation of dark count rate (DCR) in the SPAD and also the real-time monitoring of the chip temperature. In the design, two identical SPADs are fabricated on the same chip, one operating normally and the other one covered by a metal layer to be kept in the dark. The two SPADs are identically biased and connected to identical active quench and reset integrated circuits. As both detectors are identical in structure, the dark count is expected to be similar for both. Experimental measurements show that the two SPADs exhibit similar DCR performance over a range of bias voltages and temperatures. By measuring the DCR from the covered SPAD, the DCR from the normally operated SPAD can be accounted for directly. This can be particularly useful for SPADs, where the DCR is high. Experiments under illumination show that the shaded SPAD is immune to illumination over a wide range of incident light power. This enables the real-time monitoring of the temperature on the sensor chip using the counting rate from the dark operated avalanche photodiode (APD).

In the last years, custom-technology single-photon avalanche diodes (SPADs) have demonstrated remarkable performance, thanks to the fine engineering process performed on the electric field profile. However, the integration of custom SPADs in detector arrays often conflicts with the low-threshold current sensing that is mandatory to extract the timing information. A new custom-technology SPAD is introduced, that exploits an extra epitaxial layer in order to reduce the capacitive coupling between the anode and the chip substrate. The new detector shows a state-of-the-art timing jitter of 34 ps full width at half maximum and a weak dependence on the detection threshold, even when the substrate is kept at a fixed voltage, as required by the implementation of multichannel photon timing systems.

Electromagnetic energy harvesting is an effective approach to absorb vibration energy and supply electrical power to small-scale electronic devices. Magnetic spring mechanism is usually utilised in energy harvesters due to its high reliability. The conventional magnetic spring consists of two fixed magnets on the two sides of a levitated magnet. To obtain better performance, this Letter proposes an electromagnetic energy harvester where the top magnet of the magnetic spring is unfixed in comparison with the fixed type. Prototypes with the two different configurations are fabricated and an experimental setup is developed to implement comparative investigation. The results show that the power generation capability and the frequency range of the energy harvester are significantly improved by using the unfixed magnetic spring.

An electrolytic capacitor-less AC/DC converter for high-brightness LED driving is proposed. It is possible for the proposed scheme to be implemented in more cost-effective and small-sized system compared with the conventional electrolytic capacitor-less converters with additional devices. The reliability, efficacy, and lifetime of the LED driven by the suggested converter can be improved by about 6% compared to those of the conventional converter using harmonic injection method. Experiments are carried out to show the validity of the proposed converter.

Owing to environmental issue and global temperature rise, the growth of renewable energy sources such as photovoltaic arrays, fuel cells and wind turbine power has been developed. Therefore, the direct current (DC) micro-grid distributed systems are more and more important to integrate renewable energy sources, energy storage devices, local DC loads or alternative current (AC) loads and AC micro-grid through AC–DC converters to achieve high reliability and efficiency in power systems. For industry and transportation applications such as metro and light transit, the preferred voltage level on DC micro-grid system is recommended as 600–900 V. The proposed DC–DC converter contains three half-bridge circuits with a series–parallel connection at primary–secondary sides so as to decrease voltage rating of active devices and current rating of rectifier diodes. Asymmetric pulse-width modulation scheme is used to realise the soft-switching turn-on for active devices and the switching losses of power devices can be further reduced. To overcome input split voltage balance issue, flying capacitors are employed between two cascaded half-bridge circuits and the voltage rating of each active device is limited at V _in/3. Finally, experiments with a laboratory prototype are provided to verify the theoretical analysis and circuit performance.

An optimised power control with extended phase shift (OPC-EPS) for dual-active-bridge (DAB) dc–dc converters is proposed to improve the efficiency and dynamic performance simultaneously. By combining the current stress optimised calculation with direct power control, the smaller current stress and higher efficiency can be achieved compared to the traditional extended phase-shift scheme, and the dynamic response of DAB converters can be significantly improved under the input voltage fluctuation or load disturbance conditions. Meanwhile, the OPC-EPS scheme has strong robustness and it has no dependence on the circuit parameters. Finally, experimental results have verified the excellent performance of proposed scheme and the associated analysis in this Letter.

A regenerative-passive snubber (RPS) for pulse-width modulation (PWM) two-switch forward converter (TSFC) is presented. The RPS circuit is recycled the magnetic energy stored in the transformer leakage inductor and is achieved zero voltage switching turn off of power switches. Moreover, the RPS provides the resonant path formed by snubber capacitors and the snubber inductor to achieve zero current switching (ZCS) turn on of switches. In addition, the output diodes turn on/off under ZCS. The proposed RPS-PWM TSFC is analysed and experimental result for a 160 W, 300 kH prototype at the output voltage of 32 V are obtained to verify the theoretical analysis.

Theoretical imaging performance for forward-looking synthetic aperture radar (SAR) with simultaneous cross-track transceiver translation is characterised. Cross-range resolution as a function of transceiver transverse velocity and synthetic aperture length is analysed. Then the transverse velocity needed to avoid left-right ambiguity is derived. Lastly, imaging performance is demonstrated by focusing simulated data.

Highly scaled 90 nm gate-length field-plated (FP) aluminium gallium nitride (GaN)/GaN high electron mobility transistors (HEMTs) with a record current gain cut-off frequency (f _T) of 95 GHz and maximum oscillation frequency (f _MAX) of 200 GHz is reported. Both lateral scaling of source-to-drain distance to 1 μm and vertical scaling of gate-to-channel depth to 90 nm, along with n ⁺-GaN ohmic contact, were utilised to minimise the parasitics, and the gate-length scaling of FP GaN HEMTs down to 90 nm gate length was demonstrated with a record speed performance for the first time. The small-signal model predicts that the f _T is still dominated by the gate-to-source capacitance, implying that the speed performance of FP GaN HEMTs can further improve.

A Nyquist folding receiver (NYFR) is a novel ultra-wideband (UWB) receiver architecture, which can realise a wideband receiving with fewer components. Intercepted by the NYFR with a sinusoidal frequency modulation (SFM) local oscillator, a linear frequency modulation (LFM) signal will be converted into a LFM/SFM hybrid modulated signal. To simplify the processing of this kind of complicated signal, the authors propose improved dual-channel NYFR architecture with an efficient parameter estimation algorithm. Compared with the existing parameter estimation methods for the NYFR, the proposed architecture offers better estimation performance, higher signal type adaptability, and simpler operation.

A compact microstrip diplexer using triangular split-ring resonator bandpass filters with separated electric and magnetic coupling (SEMC) has been presented. The transmission zeros are attributed to the SEMC without requiring more resonators and can be controlled by the electric and magnetic couplings. The diplexer is fabricated, and the design has been demonstrated by measurement. The diplexer has a compact size of 0.264λ ₀ × 0.102λ ₀, and a measured isolation of no less than 38 dB.

A channel observation-based scaled backoff (COSB) mechanism for the carrier sense multiple access with collision avoidance of high efficiency wireless local area networks (WLANs) is devised. The proposed protocol modifies the blind scaling of contention window (W) in binary exponential backoff (BEB) scheme of currently deployed WLANs. COSB is employed to adaptively scale-up and scale-down the W size during the backoff mechanism for collided and successfully transmitted data frames, respectively. It can achieve higher throughput and shorter delay compared to the conventional BEB mechanism in highly dense WLANs.

A novel dual-band bandpass filter using patch resonator combined with microstrip resonant stubs is proposed. Two crossed slots are introduced to disturb the TE₂₀₀ mode and TE₀₀₂ mode of patch resonator, forming the first passband (low frequency). Two orthogonal microstrip stubs bring the source–load coupling while they also work as resonators, providing the second passband (high frequency). Each passband can be tuned independently due to the independent-resonant paths and non-crossed couplings between working modes. The proposed filter shares a simple layout, and three transmission zeros are obtained and it results in good selectivity and good out-band rejection. The measured results agree with simulated results well.

A quasi-elliptic bandpass filter has been designated based on substrate integrated waveguide cavity and parallel-coupled microstrip line (PCML). Two PCMLs are utilised to provide cross-coupling at both sides of the investigated filter. Electrical coupling intensity in the filter can be controlled by the proposed PCMLs which generate transmission zeros at sides of pass-band. Sharp sideband and significant out-of-band rejection are achieved.