© The Institution of Engineering and Technology
For the first time, a distinctive approach to design and investigate double-gate Schottky Barrier MOSFET (DG SB-MOSFET) using gate engineering is reported. Three isolated gates (one Control gate and two N-gates) of different work-functions on both sides of the gate oxides have been used. In the proposed device, without the need of doping, n-type region is formed at the source/drain contact-channel interfaces by inducing electron in the ultrathin intrinsic silicon channel using appropriate work-function metal N-gates. Using N-gates, the Schottky barrier height and tunnelling barrier width have been modulated to enhance the carrier injection similar to conventional dopant segregated (DS) SB-MOSFET. Moreover, the proposed DG SB-MOSFET behaves such as a conventional DS SB-MOSFET. The proposed device is expected to be free from variability caused by random dopant fluctuations. Furthermore, it offers simplified process flow with relaxing the need of doping to form dopant segregation layer and increased immunity to device variability.
References
-
-
1)
-
21. Fathipour, M., Ahangari, Z.: ‘Impact of channel thickness on the electrical characteristics of nanoscale double gate SOI MOSFET with metal source-drain’. Conf. on Optoelectronic and Microelectronic Materials and Devices, 2008, pp. 144–147.
-
2)
-
14. Neamen, D.A.: ‘Semiconductor physics and devices: basic principles’ (Boston, MA, 2003, 3rd edn.).
-
3)
-
12. Vega, R.A., Vincent, C.L., Liu, T.J.K.: ‘The effect of random dopant fluctuation on specific contact resistivity’, IEEE Trans. Electron Devices, 2010, 57, pp. 273–281 (doi: 10.1109/TED.2009.2035027).
-
4)
-
11. Afzalian, A., Flandre, D.: ‘Discrete random dopant fluctuation impact on nanoscale dopant-segregated Schottky-barrier nanowires’, IEEE Electron Device Lett., 2012, 33, pp. 1228–1230 (doi: 10.1109/LED.2012.2203350).
-
5)
-
21. Fathipour, M., Ahangari, Z.: ‘Impact of channel thickness on the electrical characteristics of nanoscale double gate SOI MOSFET with metal source-drain’. Conf. on Optoelectronic and Microelectronic Materials and Devices, 2008, pp. 144–147.
-
6)
-
13. Li, Y., Hwang, C.-H.: ‘High-frequency characteristic fluctuations of nano-MOSFET circuit induced by random dopants’, IEEE Trans. Microw. Theory Tech., 2008, 56, pp. 2726–2733 (doi: 10.1109/TMTT.2008.2007077).
-
7)
-
20. Knoch, J., Appenzeller, J.: ‘Impact of the channel thickness on the performance of Schottky barrier metal-oxide-semiconductor field-effect transistors’, Appl. Phys. Lett., 2002, 81, pp. 3082–3084 (doi: 10.1063/1.1513657).
-
8)
-
5. Vega, R.A., Liu, T.J.K.: ‘A comparative study of dopant-segregated Schottky and raised source/drain double-gate MOSFETs’, IEEE Trans. Electron Devices, 2008, 55, pp. 2665–2677 (doi: 10.1109/TED.2008.2003024).
-
9)
-
17. Rajasekharan, B., Hueting, R.J.E., Salm, C.: ‘Fabrication and characterization of the charge-plasma diode’, IEEE Electron Device Lett., 2010, 31, pp. 528–530 (doi: 10.1109/LED.2010.2045731).
-
10)
-
5. Rajasekharan, B., Salm, C., Hueting, R.J.E., Hoang, T., Schmitz, J.: ‘The charge plasma p–n diode’, IEEE Electron Device Lett., 2008, 29, (12), pp. 1367–1369 (doi: 10.1109/LED.2008.2006864).
-
11)
-
13. Vega, R.A.: ‘Comparison study of tunneling models for Schottky field effect transistors and the effect of Schottky barrier lowering’, IEEE Trans. Electron Devices, 2006, 53, pp. 1593–1600 (doi: 10.1109/TED.2006.876261).
-
12)
-
10. Urban, C., Sandow, C., Zhao, Q.T., et al: ‘Systematic study of Schottky barrier MOSFETs with dopant segregation on thin-body SOI’, Solid State Electron., 2010, 54, pp. 185–190 (doi: 10.1016/j.sse.2009.12.017).
-
13)
-
8. Kale, S., Kondekar, P.N.: ‘Ambipolar leakage suppression in Ge n-channel Schottky barrier MOSFETs’, IETE J. Res., 2015, 61, pp. 323–328 (doi: 10.1080/03772063.2015.1021387).
-
14)
-
15. (Santa Clara, CA, USA, 2012).
-
15)
-
6. Knoch, J., Zhang, M., Mantl, S., Appenzeller, J.: ‘On the performance of single-gated ultrathin-body SOI Schottky-barrier MOSFETs’, IEEE Trans. Electron Devices, 2006, 53, pp. 1669–1674 (doi: 10.1109/TED.2006.877262).
-
16)
-
4. Nishisaka, M., Matsumoto, S., Asano, T.: ‘Schottky source/drain SOIMOSFET with shallow doped extension’, Jpn. J. Appl. Phys., 2003, 42, pp. 2009–2013 (doi: 10.1143/JJAP.42.2009).
-
17)
-
18)
-
2. Pearman, D.J., Pailloncy, G., Raskin, J.P., et al: ‘Static and high-frequency behavior and performance of Schottky barrier p-MOSFET devices’, IEEE Trans. Electron Devices, 2007, 54, pp. 2796–2802 (doi: 10.1109/TED.2007.904985).
-
19)
-
19. Kale, S., Kondekar, P.N.: ‘Suppression of ambipolar leakage current in Schottky barrier MOSFET using gate engineering’, Electron. Lett., 2015, 51, pp. 1536–1538 (doi: 10.1049/el.2015.0283).
-
20)
-
5. Zhang, M., Knoch, J., Appenzeller, J., et al: ‘Improved carrier injection in ultrathin-body SOI Schottky-barrier MOSFETs’, IEEE Electron Device Lett., 2007, 28, pp. 223–225 (doi: 10.1109/LED.2007.891258).
-
21)
-
7. Zhu, S., Chen, J., Li, M.-F., et al: ‘N-type Schottky barrier source/drain MOSFET using ytterbium silicide’, IEEE Electron Device Lett., 2004, 25, pp. 565–567 (doi: 10.1109/LED.2004.831582).
-
22)
-
4. Larson, J., Snyder, J.P.: ‘Overview and status of metal S/D Schottky barrier MOSFET technology’, IEEE Trans. Electron Devices, 2006, 53, pp. 1048–1058 (doi: 10.1109/TED.2006.871842).
http://iet.metastore.ingenta.com/content/journals/10.1049/mnl.2015.0046
Related content
content/journals/10.1049/mnl.2015.0046
pub_keyword,iet_inspecKeyword,pub_concept
6
6