Polarisation analysing complementary metal-oxide semiconductor image sensor in 65-nm standard CMOS technology
- Author(s): N. Wakama 1 ; D. Okabayashi 1 ; T. Noda 1 ; K. Sasagawa 1 ; T. Tokuda 1 ; K. Kakiuchi 1 ; J. Ohta 1
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View affiliations
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Affiliations:
1:
Graduate School of Materials Science , Nara Institute of Science and Technology (NAIST) , 8916-5 Takayama , Ikoma , Nara 630-0192 , Japan
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Affiliations:
1:
Graduate School of Materials Science , Nara Institute of Science and Technology (NAIST) , 8916-5 Takayama , Ikoma , Nara 630-0192 , Japan
- Source:
Volume 2013, Issue 9,
September
2013,
p.
45 – 47
DOI: 10.1049/joe.2013.0033 , Online ISSN 2051-3305
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This is an open access article published by the IET under the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0/)
Received
11/06/2013,
Accepted
12/08/2013,
Published
21/08/2013
In the present study, the authors demonstrate a complementary metal-oxide semiconductor (CMOS) image sensor implemented with on-chip polarisers using 65-nm standard CMOS technology. The polariser is composed of metal wire grids made of metal wires fabricated by the CMOS process. An extinction ratio of 18.8 dB was obtained for a single pixel with an on-chip polariser, where the line/space widths have the finest pitch obtainable by 65-nm technology. Electrical crosstalk between pixels is reduced by over 25% using a guard ring structure. Polarisation imaging by the sensor was also performed.
Inspec keywords: CMOS image sensors
Other keywords: CMOS image sensor; complementary metal-oxide semiconductor image sensor; electrical crosstalk; line-space widths; size 65 nm; guard ring structure; polarisation imaging; on-chip polarisers; metal wire grids
Subjects: Image detectors, convertors, and intensifiers; Image sensors
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