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Modular dynamic reconfiguration in Virtex FPGAs

Modular dynamic reconfiguration in Virtex FPGAs

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© The Institution of Engineering and Technology
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Modular systems implemented on field-programmable gate arrays (FPGAs) can benefit from being able to load and unload modules at run-time, a concept that is of much interest in the research community. Although dynamic partial reconfiguration is possible in Virtex and Spartan series FPGAs, the configuration architecture of these devices is not amenable to modular reconfiguration, a limitation which has relegated research to theoretical or compromised resource allocation models. Two methods for implementing modular reconfiguration in Virtex FPGAs are compared and contrasted. The first method offers simplicity and fast reconfiguration times, but limits the geometry and connectivity of the system. The second method, developed recently, enables modules to be allocated arbitrary areas of the FPGA, bridging the gap between theory and reality and unlocking the latent potential of dynamic reconfiguration. The cost of this advancement is increased reconfiguration time. The second method has been demonstrated in three applications, including the first reported implementation of modular reconfiguration in a Virtex-4 device.

Inspec keywords: reconfigurable architectures; field programmable gate arrays

Other keywords: dynamic partial reconfiguration; module allocation; field programmable gate array; modular dynamic reconfiguration; Virtex FPGA; configuration architecture; modular reconfiguration system; resource allocation model; Spartan FPGA

Subjects: Logic circuits; Computer architecture; Logic and switching circuits

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