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Fourth-order PLL loop filter design technique with invariant natural frequency and phase margin

Fourth-order PLL loop filter design technique with invariant natural frequency and phase margin

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A new approach to the design of fourth-order PLL loop filters is described. The technique allows the specification of a desired attenuation at a given offset frequency whilst maintaining the same loop natural frequency and phase margin as for a third-order loop filter. The benefit of this approach is that improved attenuation is obtained at wide frequency offsets, without compromising the in-band performance of the loop, in contrast to other approaches. Design equations are presented for this technique, its performance is confirmed by loop-gain trajectory plots and the maximum possible attenuation as a function of the design parameters is established.

References

    1. 1)
      • P.V. Brennan . (1996) Phase-locked loops, principles and practice.
    2. 2)
    3. 3)
      • Thompson, I.: `Strategies for the analysis and design of a low noise, frequency agile synthesiser', May 2003, PhD, University College London.
    4. 4)
      • R. Stepinski . Design high-order PLLs. Microw. & RF , 69 - 86
    5. 5)
      • R.E. Best . (1993) Phase-locked loops: theory, design, and applications.
    6. 6)
      • W.F. Egan . (1981) Frequency synthesis by phase lock.
    7. 7)
      • D. Banerjee . (1998) PLL performance, simulation and design.
    8. 8)
      • F. Krug , J. Wilwert . Calculation and measurement of lock time in a phase-locked loop frequency synthesizer. Microw. J. , 22 - 38
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