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1887

access icon free Novel low-latency, high-resolution and low-cost time synchronisation

© The Institution of Engineering and Technology
Received 03/03/2017, Accepted 05/07/2017, Revised 14/06/2017, Published 07/07/2017

This study presents an oversampling-based low-latency, high-resolution and low-cost timing synchronisation technique for digital receivers. Traditional timing synchronisation employs matched filter to estimate the signal coarse time of arrival. Here, latency increases through oversampling and resolution improves via higher bandwidth. The proposed method uses single bit quantisation to employ XNOR blocks instead of multiplier and accumulator blocks in the traditional method. This substantially decreases complexity incorporating less field-programmable gate array (FPGA) surface area.

Inspec keywords: matched filters; field programmable gate arrays; synchronisation; radio receivers; quantisation (signal); time-of-arrival estimation

Other keywords: oversampling-based low-latency high-resolution low-cost timing synchronisation; matched filter; FPGA; single bit quantisation; digital receiver; XNOR block; accumulator block; signal coarse time of arrival estimation; multiplier

Subjects: Filtering methods in signal processing; Logic circuits; Radio links and equipment

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