access icon free Hybrid control scheme for mitigating the inherent DC-current in the transformer in buck-boost full-bridge converter for an all-electric motor drive system

A buck-boost full-bridge topology is preferred for low-input voltage, high gain, high-power battery fed front-end converter of an all-electric motor drive system. Variants of this topology feature high direct current (DC)-gain, soft switching, continuous input and output currents with a phase modulation/asymmetrical pulse width modulation (PWM) scheme. These variants exhibit a high-magnitude DC-current in the transformer primary winding for low-input voltage, high-power application leading to poor core utilisation and low-power density of the system. The operation and analysis of the converter are presented to highlight the DC-current in the transformer and to mitigate this, a hybrid control scheme (HCS) is proposed. The proposed HCS consists of a DC-current compensation (DCCC) loop to mitigate the DC-current in the transformer without altering the DC-gain with no additional components and output regulation (REG) loop to regulate the output. The output REG and DCCC loops are independent of each other. Soft switching is retained with this proposed scheme. The necessity to mitigate the DC-current, analysis, and implementation of the HCS is discussed. The verification of the proposed HCS scheme in simulation and the experimental prototype is presented.

Inspec keywords: PWM power convertors; power transformers; machine control; zero current switching; DC motor drives; electric current control; zero voltage switching; transformer windings

Other keywords: transformer primary winding; soft switching; hybrid control scheme; asymmetrical PWM scheme; buck-boost full-bridge converter; HCS scheme; battery fed front-end converter; all-electric motor drive system

Subjects: Transformers and reactors; d.c. machines; Power convertors and power supplies to apparatus; Drives; Current control; Control of electric power systems; Power electronics, supply and supervisory circuits

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