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1887

access icon free Robust phase locked-loop algorithm for single-phase utility-interactive inverters

© The Institution of Engineering and Technology
Received 01/05/2013, Accepted 21/09/2013, Revised 27/08/2013, Published 06/01/2014

An accurate, robust and efficient transport-delay based phase-lock loop (TDPLL) algorithm is proposed for single phase utility interactive inverters. The traditional TDPLL has low complexity and its transient response is smooth, but its performance is significantly affected by the change in the grid frequency. The proposed TDPLL is designed to have robustness against grid frequency variations. The proposed method uses two delays instead of one to cancel the grid frequency variation effect. Since the grid voltage could be polluted by harmonics and may suffer from sag/swell anomalies, the proposed method is enhanced further to be robust against these sources of disturbances. Moreover, a method is proposed to tune the parameters of the system. The performance of the proposed PLL is validated through simulations and experimental results.

Inspec keywords: transient response; phase locked loops; power supply quality; invertors; power supply circuits; delay lock loops

Other keywords: sag-swell anomaly; single phase utility interactive inverter; harmonics pollution; transport-delay based phase-lock loop algorithm; TDPLL algorithm; transient response; grid frequency variation effect

Subjects: Modulators, demodulators, discriminators and mixers; Other analogue circuits; Power electronics, supply and supervisory circuits

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