access icon free Single-pole multiple-throw switches with defected ground structure low-pass filter

In this study, the authors present a novel concept for the design of single-pole multiple-throw (SPMT) switches using defected ground structure low-pass filter (DGS LPF). The DGS LPF produces enhanced inductance to compensate the parasitic capacitance of the control transistors. As a result, the SPMT switch will consume much less silicon area. The concept is experimentally validated with a single-pole double-throw (SPDT) switch and a single-pole four-throw (SP4T) switch in 65-nm CMOS. The active area of the SPDT and SP4T switches are less than 130 × 150 μm2 and 180 × 165 μm2, respectively.

Inspec keywords: inductance; integrated circuit design; microstrip lines; low-pass filters; millimetre wave transistors; CMOS integrated circuits; switches; millimetre wave filters

Other keywords: parasitic capacitance; SPDT switch; 65-nm CMOS technology; single-pole double-throw switch; single-pole four-throw switch; inductance enhancement; microstrip line; defected ground structure low-pass filter; control transistors; SP4T switch; frequency 60 GHz; DGS LPF; frequency 300 GHz; single-pole multiple-throw switches; SPMT switches

Subjects: Semiconductor integrated circuit design, layout, modelling and testing; Waveguide and microwave transmission line components; CMOS integrated circuits; Filters and other networks; Waveguides and microwave transmission lines; Relays and switches; Solid-state microwave circuits and devices

References

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      • 8. Guan, X., Li, G., Ma, Z.: ‘Optimized design of a low-pass filter using defected ground structures’. Proc. Asia Pacific Microwave Conf., Suzhou, Jiangsu, China, December 2005, p. 4.
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http://iet.metastore.ingenta.com/content/journals/10.1049/iet-map.2014.0005
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