access icon free 65-nm CMOS low-energy RNS modular multiplier for elliptic-curve cryptography

Modular multiplication (MM) is the main operation in cryptography algorithms such as elliptic-curve cryptography (ECC) and Rivest–Shamir–Adleman, where repeated MM is used to perform elliptic curve point multiplication and modular exponentiation, respectively. The algorithm for the proposed architecture is derived from the Chinese remainder theorem and performs MM completely within a residue number system (RNS). Moreover, a 40-channel RNS moduli-set is proposed for this architecture to benefit from the short-channel width of the RNS moduli-set. The throughput of the architecture is enhanced by pipelining and pre-computations. The proposed architecture is fabricated as an ASIC using 65-nm CMOS technology. The measurement results are obtained for energy dissipation at different voltage levels from 0.43 to 1.25 V. The maximum throughput of the proposed design is 1037 Mbps while operating at a frequency of 162 MHz with an energy dissipation of 48 nJ. The proposed architecture enables the construction of low-voltage and energy-efficient ECCs.

Inspec keywords: public key cryptography; CMOS logic circuits; multiplying circuits; residue number systems

Other keywords: residue number system; energy-efficient ECC; 40-channel RNS moduli-set; modular multiplication; ASIC; 65-nm CMOS low-energy RNS modular multiplier; Chinese remainder theorem; low-voltage ECC; short-channel width; energy dissipation; elliptic curve point multiplication; Rivest-Shamir-Adleman cryptography algorithm; elliptic-curve cryptography algorithm; modular exponentiation

Subjects: Logic and switching circuits; Digital arithmetic methods; Logic circuits; CMOS integrated circuits; Cryptography; Data security

References

    1. 1)
      • 14. Nozaki, H., Motoyama, M., Shimbo, A., et al: ‘Implementation of RSA algorithm based on RNS Montgomery multiplication’. Proc. of Cryptographic Hardware and Embedded Systems (CHES 2001), September 2001, pp. 364376.
    2. 2)
      • 4. Tong-Jie, Y., Zi-Bin, D., Xiao-Hui, Y., et al: ‘An improved RNS Montgomery modular multiplier’. 2010 Int. Conf. Computer Application and System Modeling (ICCASM), October 2010, vol. 10, pp. V10-144V10-147.
    3. 3)
      • 8. Bajard, J.C., Didier, L.S., Kornerup, P.: ‘An RNS Montgomery modular multiplication algorithm’, IEEE Trans. Comput., 1998, 47, (7), pp. 766776.
    4. 4)
      • 6. Szabo, N.S., Tanaka, R.H.: ‘Residue arithmetic and its applications to computer technology’ (McGraw-Hill, New York, 1967).
    5. 5)
      • 21. Barrett, P.: ‘Implementing the Rivest, Shamir and Adleman public-key encryption algorithm on a standard digital signal processor’. Advances in Cryptology – Crypto 86, 1987 (LNCS, 263), pp. 311323.
    6. 6)
      • 18. Guillermin, N.: ‘A high speed coprocessor for elliptic curve scalar multiplications over Fp’. Proc. of the 12th Int. Conf. Cryptographic Hardware and Embedded Systems, ser. CHES'10, 2010, pp. 4864.
    7. 7)
      • 2. Hankerson, D., Menezes, A.J., Vanstone, S.: ‘Guide to elliptic curve cryptography’ (Springer-Verlag New York, Inc., Secaucus, NJ, USA, 2003).
    8. 8)
      • 13. Kawamura, S., Koike, M., Sano, F., et al: ‘Cox-Rower architecture for fast parallel Montgomery multiplication’. Advances in Cryptology – Eurocrypt 2000, 2000 (LNCS, 1807), pp. 523538.
    9. 9)
      • 10. Bajard, J.C., Imbert, L.: ‘A full RNS implementation of RSA’, IEEE Trans. Comput., 2004, 53, (6), pp. 769774.
    10. 10)
      • 26. Kuang, S.-R., Wang, J.-P., Chang, K.-C., et al: ‘Energy-efficient high-throughput Montgomery modular multipliers for RSA cryptosystems’, IEEE Trans. VLSI Syst., 2013, 21, (11), pp. 19992009.
    11. 11)
      • 11. Kong, Y., Asif, S., Khan, M.: ‘Modular multiplication using the core function in the residue number system’, Appl. Algebra Eng. Commun. Comput., 2016, 27, (1), pp. 116.
    12. 12)
      • 7. Aichholzer, O., Hassler, H.: ‘A fast method for modulus reduction in residue number system’. Proc. Economical Parallel Processing, 1993, pp. 4154.
    13. 13)
      • 1. Rivest, R.L., Shamir, A., Adleman, L.M.: ‘A method for obtaining digital signatures and public-key cryptosystems’, Commun. ACM, 1978, 21, (2), pp. 120126.
    14. 14)
      • 16. Gandino, F., Lamberti, F., Montuschi, P., et al: ‘A general approach for improving RNS Montgomery exponentiation using pre-processing’. 2011 20th IEEE Symp. Computer Arithmetic (ARITH), July 2011, pp. 195204.
    15. 15)
      • 12. Montgomery, P.L.: ‘Modular multiplication without trial division’, Math. Comput., 1985, 44, (170), pp. 519521.
    16. 16)
      • 23. Asif, S., Kong, Y.: ‘Highly parallel modular multiplier for elliptic curve cryptography in residue number system’, Circuits Syst. Signal Process., 2017, 36, (3), pp. 10271051.
    17. 17)
      • 9. Bajard, J.C., Didier, L.S., Kornerup, P.: ‘Modular multiplication and base extensions in residue number systems’. Proc. 15th IEEE Symp. Computer Arithmetic, 2001, vol. 2, pp. 5965.
    18. 18)
      • 24. Barrett, P.: ‘Communications authentication and security using public key encryption – a design for implementation’. Master's thesis, Oxford University, September 1984.
    19. 19)
      • 3. Bajard, J.C., Didier, L.S., Kornerup, P., et al: ‘Some improvements on RNS Montgomery modular multiplication’. Advanced Signal Processing Algorithms, Architectures, and Implementations, Proc. SPIE, 2000, vol. 4116, pp. 214225.
    20. 20)
      • 17. Schinianakis, D., Fournaris, A., Michail, H., et al: ‘An RNS implementation of an Fp elliptic curve point multiplier’, IEEE Trans. Circuits Syst. I, 2009, 56, (6), pp. 12021213.
    21. 21)
      • 19. Antão, S., Bajard, J.C., Sousa, L.: ‘RNS-based elliptic curve point multiplication for massive parallel architectures’, Comput. J., 2012, 55, (5), pp. 629647.
    22. 22)
      • 22. Schinianakis, D., Stouraitis, T.: ‘An RNS Barrett modular multiplication architecture’. 2014 IEEE Int. Symp. Circuits and Systems (ISCAS), June 2014, pp. 22292232.
    23. 23)
      • 25. Dhem, J.-F.: ‘Design of an efficient public-key cryptographic library for RISC based smart cards’. PhD dissertation, Université Catholique de Louvain, May 1998.
    24. 24)
      • 27. Kaihara, M., Takagi, N.: ‘Bipartite modular multiplication method’, IEEE Trans. Comput., 2008, 57, (2), pp. 157164.
    25. 25)
      • 20. Esmaeildoust, M., Schinianakis, D., Javashi, H., et al: ‘Efficient RNS implementation of elliptic curve point multiplication over GF(p)’, IEEE Trans. VLSI Syst., 2013, 21, (8), pp. 15451549.
    26. 26)
      • 5. Gandino, F., Lamberti, F., Paravati, G., et al: ‘An algorithmic and architectural study on Montgomery exponentiation in RNS’, IEEE Trans. Comput., 2012, 61, (8), pp. 10711083.
    27. 27)
      • 28. Neto, J., Ferreira Tenca, A., Ruggiero, W.: ‘A parallel and uniform k-partition method for Montgomery multiplication’, IEEE Trans. Comput., 2014, 63, (9), pp. 21222133.
    28. 28)
      • 15. Guillermin, N.: ‘A coprocessor for secure and high speed modular arithmetic’. Report 2011/354, Cryptology ePrint Archive, 2011.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cdt.2017.0017
Loading

Related content

content/journals/10.1049/iet-cdt.2017.0017
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading