Parmar, Chintan A.; Ramanadham, Bhaskar; Darji, Anand D.: 'FPGA implementation of hardware efficient adaptive filter robust to impulsive noise', IET Computers & Digital Techniques, 2017, 11, (3), p. 107-116, DOI: 10.1049/iet-cdt.2016.0067
IET Digital Library, https://digital-library.theiet.org/;jsessionid=43c1ocs3dtbgg.x-iet-live-01content/journals/10.1049/iet-cdt.2016.0067