Liu, Qiang; Qian, HanJing: 'Fast and accurate circuit delay model for FPGA architectural exploration', IET Computers & Digital Techniques, 2017, 11, (3), p. 117-123, DOI: 10.1049/iet-cdt.2016.0053
IET Digital Library, https://digital-library.theiet.org/;jsessionid=x2hk78dw2vho.x-iet-live-01content/journals/10.1049/iet-cdt.2016.0053