access icon free Truncated ternary multipliers

Balanced ternary number representation and arithmetic, based on the symmetric radix-3 digit set {−1, 0, +1}, has been studied at various times in the history of computing. Among established advantages of balanced ternary arithmetic are representational symmetry, favourable error characteristics and rounding by truncation. In this study, we show an additional advantage: that of lower-error truncated multiplication with the same relative cost reduction as in truncated binary multipliers.

Inspec keywords: multiplying circuits; digital arithmetic

Other keywords: representational symmetry; truncation; cost reduction; symmetric radix-3 digit set; balanced ternary number representation; balanced ternary arithmetic; favourable error characteristics; truncated ternary multipliers; truncated binary multiplier; lower-error truncated multiplication

Subjects: Logic circuits; Logic and switching circuits; Digital arithmetic methods

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