Differential pixel-based low-power and high-speed implementation of DCT for on-board satellite image processing

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Differential pixel-based low-power and high-speed implementation of DCT for on-board satellite image processing

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Low-power and high-speed discrete cosine transform (DCT) implementation of the images captured by the satellites presents a hardware design problem. The cost of the DCT implementation is dominated by the complexity of the multiplication of input data (image) with the DCT matrix. The techniques for minimising the complexity of multiplication by employing a differential pixel method are presented. In the proposed method 8×8 blocks of input image matrix are considered, the difference between the adjacent pixels is calculated and those differential pixels are used in DCT transformation. Synthesis results on 0.18 µm CMOS technology show that the proposed method gives an average of 13.2% reduction in power consumption and 10.9% improvement in speed over the conventional method. The proposed method can also be combined with the common subexpression elimination method for further reduction.

Inspec keywords: geophysical signal processing; remote sensing; low-power electronics; digital signal processing chips; image processing; integrated circuit design; discrete cosine transforms; CMOS integrated circuits

Other keywords: image matrix; power consumption; discrete cosine transform; subexpression elimination; hardware design; CMOS technology; differential pixel; multiplication complexity; satellite image processing; size 0.18 mum; DCT matrix

Subjects: Geophysics computing; Optical, image and video signal processing; CMOS integrated circuits; Digital signal processing chips; Integral transforms; Integral transforms; Computer vision and image processing techniques; Microprocessors and microcomputers; Geophysical techniques and equipment

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