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access icon free Two-stage current-reused variable-gain low-noise amplifier for X-band receivers in 65 nm complementary metal oxide semiconductor technology

© The Institution of Engineering and Technology
Received 14/12/2017, Accepted 06/03/2018, Revised 16/02/2018, Published 12/03/2018

In this study, a variable gain low noise amplifier (VG-LNA) working at X band is designed and simulated in 65 nm complementary metal oxide semiconductor technology. A two-stage structure is used in the proposed VG-LNA. Besides, the current-reused technique causes a higher gain without consuming extra power. As an on-chip voltage (V cnt) is changed, the gain continuously and almost linearly varies. The highest gain is 27.8 dB that can be reduced to 8.3 dB almost linearly and continuously as the control voltage is increased. The lowest value of S11 is −28.2 dB at 10 GHz. Also, NF is <2.75 dB at the operating frequency range; while NFmin = 1.8 dB. The highest value of third-order intercept point is 2.03 dBm that always remain larger than −10.1 dBm. The basic advantage of this structure in comparison with other similar works is that not only the key parameters remain fixed with reduction of gain, but also the operation range of V cnt is widened from 0.3 V to V dd in order to extend the gain control range to 19.5 dB. Moreover, these results are achieved in a situation that the proposed VG-LNA draws only 3.9 mA from a 1.2 V.

Inspec keywords: low noise amplifiers; microwave receivers; CMOS analogue integrated circuits; MMIC amplifiers; UHF amplifiers

Other keywords: gain 28.2 dB; noise figure parameter; bandwidth 1.3 GHz; noise figure 1.8 dB; frequency 10 GHz; two-stage current-reused variable-gain low noise amplifier; gain 8.3 dB; reflection loss parameter; voltage 0.3 V; size 65 nm; VG-LNA; gain 27.8 dB; X-band receiver; NF parameter; complementary metal oxide semiconductor technology

Subjects: Microwave integrated circuits; CMOS integrated circuits; Amplifiers

References

    1. 1)
      • 8. Lee, J.-Y., Park, H.-K., Chang, H.-J., et al: ‘Low-power UWB LNA with common-gate and current-reuse techniques’, IET Microw. Antennas Propag., 2012, 6, (7), p. 793.
    2. 2)
      • 18. Sturm, J., Xiang, X., Pretl, H.: ‘A 65 nm CMOS wide-band LNA with continuously tunable gain from 0 dB to 24 dB’. 2013 IEEE Int. Symp. on Circuits and Systems (ISCAS2013), 2013, pp. 733–736.
    3. 3)
      • 22. Yarahmadi, A., Jannesari, A.: ‘Two-path inverter-based low noise amplifier for 10–12 GHz applications’, Microelectron. J., 2016, 50, pp. 76–82.
    4. 4)
      • 15. Dai, R., Zheng, Y., He, J., et al: ‘A 2.5-GHz 8.9-dBm IIP3 current-reused LNA in 0.18-μm CMOS technology’. 2014 IEEE Int. Symp. on Radio-Frequency Integration Technology, 2014, pp. 1–3.
    5. 5)
      • 6. Hsieh, H., Lu, L.H.: ‘Design of ultra-low-voltage RF frontends with complementary current-reused architectures’, IEEE Trans. Microw. Theory Tech., 2007, 55, (7), pp. 1545–1558.
    6. 6)
      • 16. Razavi, B.: ‘Design of analog CMOS integrated circuits’, Des. Analog C. Integr. Circuits, 2001, 6, pp. 44–44.
    7. 7)
      • 13. Nguyen, T.-K., Kim, C.-H., Ihm, G.-J., et al: ‘CMOS low-noise amplifier design optimization techniques’, IEEE Trans. Microw. Theory Tech., 2004, 52, (5), pp. 1433–1442.
    8. 8)
      • 7. Parvizi, M., Allidina, K., El-Gamal, M.N.: ‘An ultra-low-power wideband inductorless CMOS LNA with tunable active shunt-feedback’, IEEE Trans. Microw. Theory Tech., 2016, 64, (6), pp. 1843–1853.
    9. 9)
      • 12. Wei, M.-D., Chang, S.-F., Negra, R.: ‘A DC-invariant gain control technique for CMOS differential variable-gain low-noise amplifiers’. NORCHIP 2010, Finland, 2010, pp. 1–4.
    10. 10)
      • 1. Ray, A.K., Shit, R.C.: ‘Design of ultra-low noise, wideband low-noise amplifier for highly survival radar receiver’, IET Circuits Devices Syst., 2016, 10, (6), pp. 473–480.
    11. 11)
      • 25. Parvizi, M., Allidina, K., El-Gamal, M.N.: ‘Short channel output conductance enhancement through forward body biasing to realize a 0.5 V 250 μW 0.6–4.2 GHz current-reuse CMOS LNA’, IEEE J. Solid-State Circuits, 2016, 51, (3), pp. 574–586.
    12. 12)
      • 3. Nikbakhsh, M.R., Abiri, E., Salem, S., et al: ‘A power-efficient high gain differential LNA in 0.18 µm CMOS technology for 400–900 MHz frequency range’. 2017 Iranian Conf. on Electrical Engineering, Iran, 2017, pp. 396–400.
    13. 13)
      • 11. Lai, H.C., Lin, Z.M.: ‘A low noise gain-variable LNA for 802.11a WLAN’. 2007 IEEE Conf. on Electron Devices and Solid-State Circuits, Taiwan, 2007, pp. 973–976.
    14. 14)
      • 23. Belmas, F., Hameau, F., Fournier, J.M.: ‘A low power inductorless LNA with double Gm enhancement in 130 nm CMOS’, IEEE J. Solid-State Circuits, 2012, 47, (5), pp. 1094–1103.
    15. 15)
      • 14. Toofan, S., Rahmati, A.R., Abrishamifar, A., et al: ‘Low power and high gain current reuse LNA with modified input matching and inter-stage inductors’, Microelectron. J., 2008, 39, (12), pp. 1534–1537.
    16. 16)
      • 19. Dai, R., Zheng, Y., He, J., et al: ‘A 0.5-V novel complementary current-reused CMOS LNA for 2.4 GHz medical application’, Microelectron. J., 2016, 55, pp. 64–69.
    17. 17)
      • 20. Galal, A.I.A., Pokharel, R.K., Kanaya, H., et al: ‘Linearization technique using bipolar transistor at 5 GHz low noise amplifier’, AEU – Int. J. Electron. Commun., 2010, 64, (10), pp. 978–982.
    18. 18)
      • 2. Razavi, B.: ‘RF microelectronics (Prentice Hall communications engineering and emerging technologies series)’ (Prentice Hall, New Jersey, 2011), p. 960.
    19. 19)
      • 21. Nikbakhsh, M.R., Abiri, E., Ghasemian, H., et al: ‘A two stage variable-gain low-noise amplifier for X-band in 0.18 µm CMOS’, Wirel. Pers. Commun., 2017, 98, pp. 1–15.
    20. 20)
      • 9. Hsu, M.-T., Chang, Y.-C., Huang, Y.-Z.: ‘Design of low power UWB LNA based on common source topology with current-reused technique’, Microelectron. J., 2013, 44, (12), pp. 1223–1230.
    21. 21)
      • 17. Huang, D., Diao, S., Qian, W., et al: ‘A resistive-feedback LNA in 65 nm CMOS with a gate inductor for bandwidth extension’, Microelectron. J., 2015, 46, (1), pp. 103–110.
    22. 22)
      • 24. Khurram, M., Hasan, S.M.R.: ‘A 3–5 GHz current-reuse gm-boosted CG LNA for ultrawideband in 130 nm CMOS’, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2012, 20, (3), pp. 400–409.
    23. 23)
      • 10. Su, H.W.S.H.W., Wang, Z.H.W.Z.H.: ‘The impact of different gain control methods on performance of CMOS variable-gain LNA’. 2007 IEEE Int. Symp. on Circuits and Systems, China, 2007, vol. 2, pp. 2208–2211.
    24. 24)
      • 5. Parvizi, M., Allidina, K., Nabki, F., et al: ‘A 0.4 V ultra low-power UWB CMOS LNA employing noise cancellation’. Proc. IEEE Int. Symp. on Circuits and Systems, China, 2013, pp. 2369–2372.
    25. 25)
      • 4. Vinaya, M.M., Mahanta, A., Paily, R.: ‘Analysis and design of moderate inversion based low power low-noise amplifier’, IET Comput. Digit. Tech., 2016, 10, (5), pp. 254–260.
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