Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

access icon free An 114 Hz–12 MHz digitally controlled low-pass filter for biomedical and wireless applications

This study presents a wide tunable Gm-C low-pass filter for biomedical and wireless applications. The proposed filter was designed using the standard 90 nm complementary metal–oxide–semiconductor technology operating with a balanced supply voltage of 1.2 V. Modified linearisation techniques are used to improve the linearity of the digital programmable operational transconductance amplifiers (DPOTAs) which are used in the filter design. The proposed filter consists of three parallel fourth-order Butterworth sections. Each section is designed and optimised to target a specific band of frequencies. The operation of selecting between the different sections is free of any physical switches. Turning off the unwanted sections is utilised by setting the control bits of the corresponding DPOTAs to zeros. The performance of the proposed filter and DPOTAs is validated through simulation results. The third-order harmonic distortion of the DPOTA remains below −60 dB up to 0.5 V differential input voltage. The simulation results show that the digitally tunable cutoff frequency of the proposed low-pass filter is widely varied in the range of 114 Hz–12 MHz. The proposed filter achieves IIP3 of 28 dBm.

References

    1. 1)
      • 28. Rezaei, F.: ‘Adaptive gm3 cancellation linearisation and its application to wide-tunable gm-c filter design’, IET Circuits Devices Syst., 2017, 11, (5), pp. 478486.
    2. 2)
      • 29. Sánchez-Rodríguez, T., Gomez-Galan, J.A., Carvajal, R.G., et al: ‘A 1.2-v 450-μw gmc bluetooth channel filter using a novel gain-boosted tunable transconductor’, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2015, 23, (8), pp. 15721576.
    3. 3)
      • 6. Krummenacher, F., Joehl, N.: ‘A 4-mhz cmos continuous-time filter with on-chip automatic tuning’, IEEE J. Solid-State Circuits, 1988, 23, (3), pp. 750758.
    4. 4)
      • 4. Silva-Martinez, J., Steyaert, M.S., Sansen, W.M.: ‘A large-signal very low-distortion transconductor for high-frequency continuous-time filters’, IEEE J. Solid-State Circuits, 1991, 26, (7), pp. 946955.
    5. 5)
      • 26. Mahmoud, S.A., Hashiesh, M.A., Soliman, A.M.: ‘Low-voltage digitally controlled fully differential current conveyor’, IEEE Trans. Circuits Syst. I, Regul. Pap., 2005, 52, (10), pp. 20552064.
    6. 6)
      • 27. Thyagarajan, S.V., Pavan, S., Sankar, P.: ‘Low distortion active filters using the g m-assisted ota-rc technique’. 2010 Proc. of the ESSCIRC, Helsinki, Finland, 2010, pp. 162165.
    7. 7)
      • 23. Elamien, M.B., Mahmoud, S.A.: ‘Multi-standard lowpass filter for baseband chain using highly linear digitally programmable OTA’. 2017 40th Int. Conf. Telecommunications and Signal Processing (TSP), Barcelona, Spain, 2017, pp. 298301.
    8. 8)
      • 8. Wong, S.: ‘Novel drain-biased transconductance building blocks for continuous-time filter applications’, Electron. Lett., 1989, 25, (2), pp. 100101.
    9. 9)
      • 21. Elamien, M.B., Mahmoud, S.A.: ‘A highly linear DPOTA-based configurable analog front-end for exg (eeg, ecg, and emg)’. 14th IEEE Int. SoC Design Conf. (ISOCC 2017), Seoul, Korea, 2017.
    10. 10)
      • 14. Khateb, F., Khatib, N., Prommee, P., et al: ‘Ultra-low voltage tunable transconductor based on bulk-driven quasi-floating-gate technique’, J. Circuits Syst. Comput., 2013, 22, pp. 113.
    11. 11)
      • 12. Mahmoud, S.A., Soliman, A.M.: ‘A CMOS programmable balanced output transconductor for analogue signal processing’, Int. J. Electron., 1997, 82, (6), pp. 605620.
    12. 12)
      • 2. Mahmoud, S.A., Soliman, E.A.: ‘Multi-standard receiver baseband chain using digitally programmable OTA based on ccii and current division networks’, J. Circuits Syst. Comput., 2013, 22, (04), p. 1350019.
    13. 13)
      • 22. Elamien, M.B., Mahmoud, S.A.: ‘Third-order elliptic lowpass filter for multi-standard baseband chain using highly linear digitally programmable OTA’. The Int. Conf. Applied Electronics and Engineering 2017 (ICAEE 2017), Sarawak, Malaysia, 2017.
    14. 14)
      • 10. Tsividis, Y., Czarnul, Z., Fang, S.: ‘MOS transconductors and integrators with high linearity’, Electron. Lett., 1986, 22, (5), pp. 245246.
    15. 15)
      • 7. Pennock, J.L.: ‘CMOS triode transconductor for continuous-time active integrated filters’, Electron. Lett., 1985, 21, (18), pp. 817818.
    16. 16)
      • 9. Gatti, U., Maloberti, F., Palmisano, G., et al: ‘CMOS triode-transistor transconductor for high-frequency continuous-time filters’, IEE Proc., Circuits Devices Syst., 1994, 141, (6), pp. 462468.
    17. 17)
      • 3. Nedungadi, A., Viswanathan, T.: ‘Design of linear CMOS transconductance elements’, IEEE Trans. Circuits Syst., 1984, 31, (10), pp. 891894.
    18. 18)
      • 13. Khateb, F., Kulej, T., Vlassis, S.: ‘Extremely low-voltage bulk-driven tunable transconductor’, Circuits Syst. Signal Process., 2017, 36, (2), pp. 511524.
    19. 19)
      • 5. Wang, Y.-T., Lu, F., Abidi, A.A.: ‘A 12.5 mHz CMOS continuous time bandpass filter’. 1989 36th IEEE Int. Solid-State Circuits Conf. – Digest of Technical Papers (ISSCC), New York, USA, 1989, pp. 198199.
    20. 20)
      • 1. Alhammadi, A.A., Nazzal, T.B., Mahmoud, S.A.: ‘A CMOS EEG detection system with a configurable analog front-end architecture’, Analog Integr. Circuits Signal Process., 2016, 89, (1), pp. 151176.
    21. 21)
      • 16. Johns, D.A., Martin, K.: ‘Analog integrated circuit design’ (John Wiley & Sons, 2008).
    22. 22)
      • 18. Popa, C., Mitrea, O.: ‘Constant g m rail-to-rail CMOS input stage with improved linearity’. Proc. of the 2nd Int. Symp. on Image and Signal Processing and Analysis, 2001 (ISPA 2001), Pula, Croatia, 2001, pp. 511515.
    23. 23)
      • 11. Gopinathan, V., Tsividis, Y.P., Tan, K.-S., et al: ‘Design considerations for high-frequency continuous-time filters and implementation of an antialiasing filter for digital video’, IEEE J. Solid-State Circuits, 1990, 25, (6), pp. 13681378.
    24. 24)
      • 25. Elamien, M.B., Mahmoud, S.A.: ‘On the design of highly linear CMOS digitally programmable operational transconductance amplifiers for low and high-frequency applications’, Analog Integr. Circuits Signal Process., 2018, 94, pp. 117.
    25. 25)
      • 20. Elamien, M.B., Mahmoud, S.A.: ‘A 1 mHz-10.2 mHz bw/0 db-70 db gain DPOTA-based baseband chain receiver’. 14th IEEE Int. SoC Design Conf. (ISOCC 2017), Seoul, Korea, 2017.
    26. 26)
      • 17. Kuo, K.C., Leuciuc, A.: ‘A linear MOS transconductor using source degeneration and adaptive biasing’, IEEE Trans. Circuits Syst. II, Analog Digital Signal Process., 2001, 48, (10), pp. 937943.
    27. 27)
      • 30. Rezaei, F., Azhari, S.J.: ‘A new controllable adaptive biasing linearization technique for a CMOS OTA and its application to tunable gm-c filter design’, Microelectron. J., 2015, 46, (9), pp. 810818.
    28. 28)
      • 19. Elamien, M.B., Mahmoud, S.A.: ‘Analysis and design of a highly linear CMOS OTA for portable biomedical applications in 90 nm CMOS’, Microelectron. J., 2017, 70, pp. 7280.
    29. 29)
      • 24. Elamien, M.B., Mahmoud, S.A.: ‘A linear CMOS balanced output transconductor using double differential pair with source degeneration and adaptive biasing’. IEEE 59th MWSCAS, Abu Dhabi, UAE, 2016, pp. 253256.
    30. 30)
      • 15. Kulej, T., Khateb, F.: ‘Bulk-driven adaptively biased OTA in 0.18 μm CMOS’, Electron. Lett., 2015, 51, (6), pp. 458460.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2017.0410
Loading

Related content

content/journals/10.1049/iet-cds.2017.0410
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
This is a required field
Please enter a valid email address