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access icon free Performance enhancement of a VCO using symbolic modelling and optimisation

© The Institution of Engineering and Technology
Received 21/06/2017, Accepted 20/10/2017, Revised 20/09/2017, Published 30/10/2017

This study proposed an application of symbolic technique on the characterisation of a ring voltage controlled oscillator (VCO) for optimum performance. Here nullor-based symbolic noise modelling and analysis of the CMOS ring VCO is carried out. Circuit equations are processed through modelling of all the metal–oxide–semiconductor field-effect transistors with their nullor equivalent. The closed-form expressions for the total output noise density and phase noise of VCO are obtained. With this technique, the total output noise density and phase noise calculated are compared with the results obtained from the transistor-level simulation. From the comparison, it has been observed that the nullor-based modelling and analysis simplifies the noise expression as well as reduces CPU execution time. The performance enhancement of the VCO is carried out using two different optimisation techniques. These are particle swam optimisation and non-dominated sorting genetic algorithm. The results obtained for the optimised VCO are then tested using SPICE. The SPICE result shows a significant improvement in phase noise, power consumption and tuning range for the optimised VCO.

Inspec keywords: CMOS analogue integrated circuits; voltage-controlled oscillators; integrated circuit modelling; phase noise; genetic algorithms; integrated circuit noise; particle swarm optimisation

Other keywords: SPICE; metal-oxide-semiconductor field-effect transistors; particle swam optimisation; CMOS analysis; circuit equation; nullor equivalent; nondominated sorting genetic algorithm; ring voltage controlled oscillator; transistor-level simulation; symbolic modelling; phase noise; total output noise density; ring VCO; nullor-based symbolic noise modelling

Subjects: Optimisation techniques; CMOS integrated circuits; Oscillators; Analogue circuit design, modelling and testing; Semiconductor integrated circuit design, layout, modelling and testing

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