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Oscillation analysis and current peak reduction in paralleled SiC MOSFETs

Oscillation analysis and current peak reduction in paralleled SiC MOSFETs

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Parallel connection of power metal oxide semiconductor field effect transistors (MOSFETs) is often used in the high current side of power conversion systems to obtain a thermal dispersion and low conduction losses. However, a parallel connection may lead to a current unbalance due to the difference of parasitic parameters and switching characteristics of the paralleled devices. The current unbalance generates current oscillations, and in the worst case, it may lead to complete destruction of the power devices. This study analyses an inherent oscillation of two paralleled SiC MOSFETs, under current unbalance conditions. Based on the proposed analysis, it is found that the parasitic inductance is the main cause of the coupled oscillation, which is composed of two different oscillation frequencies. In this study, the coupled oscillation leads to a difference of peak currents between paralleled devices. The circuit conditions, considering the parasitic inductances, are investigated to suppress the coupled oscillation. As a result, a reduction of the common parasitic inductance allows preventing the coupled oscillation and to suppress the peak combined current of paralleled devices. Moreover, a peak current reduction by 37.8% can be achieved, as a result of eliminating the coupled oscillation.

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