RT Journal Article
A1 Fabian Khateb
A1 Winai Jaikla
A1 Tomasz Kulej
A1 Montree Kumngern
A1 David Kubánek

PB iet
T1 Shadow filters based on DDCC
JN IET Circuits, Devices & Systems
VO 11
IS 6
SP 631
OP 637
AB This study presents a new realisation of voltage-mode shadow filters based on low-voltage low-power differential difference current conveyor (DDCC). Thanks to the attractive features of the DDCC, including its capability of performing arithmetic operations, the proposed filters offer the advantage of circuit simplicity, minimum number of active and passive elements, and no need for additional summing circuit, compared to the previous available shadow filter designs. The DDCC was designed and fabricated in Cadence platform using 0.35 μm CMOS AMIS process with supply voltage and power consumption of 1 V and 37 µW, respectively. The presented simulation and experimental results using a real chip validate the functionality of the proposed filters.
K1 size 0.35 mum
K1 low-voltage low-power differential difference current conveyor
K1 Cadence platform
K1 power 37 muW
K1 active elements
K1 voltage-mode shadow filter design
K1 CMOS AMIS process
K1 passive elements
K1 voltage 1 V
K1 DDCC
DO https://doi.org/10.1049/iet-cds.2016.0522
UL https://digital-library.theiet.org/;jsessionid=5m0anck1jlb3.x-iet-live-01content/journals/10.1049/iet-cds.2016.0522
LA English
SN 1751-858X
YR 2017
OL EN