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access icon free CORDIC-based Hann windowed sliding DFT architecture for real-time spectrum analysis with bounded error-accumulation

© The Institution of Engineering and Technology
Received 27/09/2016, Accepted 02/04/2017, Revised 03/03/2017, Published 05/04/2017

This study presents a COordinate rotation DIgital computer (CORDIC)-based novel architecture combining the sliding discrete Fourier transform (DFT) with Hann windowing to reduce the leakage effect of the DFT spectrum. The proposed architecture also presents a refreshing approach to minimise error due to the finite word-length in the output windowed spectrum compared with the existing method. The architecture can also be extended for other high order generalised cosine windows such as Blackman, Blackman–Harris, and flat-top. The post-route results on the Virtex-6 FPGA as well as the physical ASIC post-layout results are also presented for the proposed architecture.

Inspec keywords: application specific integrated circuits; field programmable gate arrays; digital arithmetic; discrete Fourier transforms; spectral analysis; signal processing

Other keywords: Virtex-6 FPGA; bounded error-accumulation; flat-top cosine window; Hann windowed sliding DFT architecture; leakage effect; finite word-length; CORDIC; sliding discrete Fourier transform; DFT spectrum; real-time spectrum analysis; ASIC post-layout; Blackman–Harris cosine window; cordinate rotation digital computer; high order generalised cosine windows

Subjects: Integral transforms; Signal processing and detection; Integral transforms; Digital signal processing; Logic circuits; Digital arithmetic methods; Logic and switching circuits

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