A novel resistance-to-digital converter (RDC), based on the integrating type analogue-to-digital converter principle, is presented in this study. The conversion time of the proposed scheme is not a function of the current value of the parameter being measured. Thus, by suitably setting this parameter, the converter can be made to reject the effects of interference at a particular frequency, such as, that due to power-line at 50/60 Hz. Error analysis was conducted to ascertain the effects of non-idealities of various components of the circuit, on its output. Simulation studies were carried out in LTSPICE to verify the linearity and the interference rejection capability of the converter. Further, a prototype RDC was developed in the laboratory and tested to confirm the results of the simulation.

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Resistance-to-digital converter designed for high power-line interference rejection capability

References

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