© The Institution of Engineering and Technology
Asymmetric underlap dual-k spacer hybrid fin field-effect transistor (FinFET) is a novel hybrid device that combines three significant and advanced technologies, i.e. ultra-thin body, three-dimensional (3D) FinFET, and asymmetric spacer engineering on a single silicon on insulator platform. This innovative architecture promises to enhance the device performance as compared with conventional FinFET without increasing the chip area. Recently, high-k dielectric spacer materials are of research interest due to their better electrostatic control and more immune towards short channel effects in nanoscale devices. For the first time, this study introduces an asymmetric high-k dielectric spacer near the source side with optimised length in hybrid FinFET and claims an improvement in device integrity. From extensive 3D device simulation, the authors have determined that the proposed architecture is superior in performance as compared with traditional FinFET.
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