access icon free Benefits of asymmetric underlap dual-k spacer hybrid fin field-effect transistor over bulk fin field-effect transistor

Asymmetric underlap dual-k spacer hybrid fin field-effect transistor (FinFET) is a novel hybrid device that combines three significant and advanced technologies, i.e. ultra-thin body, three-dimensional (3D) FinFET, and asymmetric spacer engineering on a single silicon on insulator platform. This innovative architecture promises to enhance the device performance as compared with conventional FinFET without increasing the chip area. Recently, high-k dielectric spacer materials are of research interest due to their better electrostatic control and more immune towards short channel effects in nanoscale devices. For the first time, this study introduces an asymmetric high-k dielectric spacer near the source side with optimised length in hybrid FinFET and claims an improvement in device integrity. From extensive 3D device simulation, the authors have determined that the proposed architecture is superior in performance as compared with traditional FinFET.

Inspec keywords: dielectric materials; MOSFET; silicon-on-insulator; semiconductor device models

Other keywords: bulk fin field-effect transistor; silicon on insulator; asymmetric spacer engineering; short channel effect; high-k dielectric spacer material; ultrathin body three-dimensional FinFET; electrostatic control; 3D device simulation; hybrid fin field-effect transistor; asymmetric underlap dual-k spacer; nanoscale device

Subjects: Semiconductor device modelling, equivalent circuits, design and testing; Insulated gate field effect transistors; Dielectric materials and properties

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http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2016.0125
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Errata
An Erratum has been published for this content:
Erratum ‘Benefits of asymmetric underlap dual-k spacer hybrid fin field-effect transistor over bulk fin field-effect transistor’