access icon free Compact noise modelling for common double-gate metal–oxide–semiconductor field-effect transistor adapted to gate-oxide-thickness asymmetry

On the basis of the quasi-linear relationship between the surface potentials of a common double-gate metal–oxide–semiconductor field-effect transistor, a compact noise model, which is adapted to gate-oxide-thickness asymmetry, is proposed. The proposed model includes a physics-based thermal and flicker noise model. The effect of the lateral and vertical electric fields on the mobility degradation has also been taken into account for accurate noise prediction in short-channel devices. The thermal noise model is compared with the technology computer aided design (TCAD) simulation data and good agreement is observed. The proposed noise model appears to be efficient for analogue circuit simulation.

Inspec keywords: semiconductor device noise; flicker noise; thermal noise; MOSFET; semiconductor device models; surface potential

Other keywords: short-channel device; compact noise modelling; mobility degradation; noise prediction; thermal noise model; common double gate metal-oxide-semiconductor field-effect transistor; electric field; gate-oxide-thickness asymmetry; TCAD simulation; flicker noise model; surface potential; analogue circuit simulation

Subjects: Other topics in statistics; Semiconductor device modelling, equivalent circuits, design and testing; Insulated gate field effect transistors

References

    1. 1)
      • 5. McWhorter, A.L.: ‘1/f noise and germanium surface properties’ (Semiconductor Surface Physics, University of Pennsylvania Press, Philadelphia, PA, 1957), p. 207.
    2. 2)
    3. 3)
    4. 4)
      • 11. ‘ATLAS, Device simulation framework, Version 5.18.3.R’, Users’ Manual [online] (Silvaco International, USA, 2012). Available at: www.silvaco.com.
    5. 5)
      • 9. Ong, S.N., Chew, K.W.J., Yeo, K.S., et al: ‘A new unified model for channel thermal noise of deep sub-micron RFCMOS’. IEEE Int. Symp. on Radio-Frequency Integration Technology, Singapore, 2009, pp. 280283.
    6. 6)
      • 1. Wong, H.S.P: ‘Beyond the conventional transistor’, IBM J. Res.Dev., 2003, 46, (2-3).
    7. 7)
    8. 8)
      • 17. Langevelde, R.V., Paasschens, J.C.J., Scholten, A.J., et al: ‘New compact model for induced gate current noise’, Int. Electron Devices Meet.IEDM, USA, 2003, pp. 36.2.136.2.4.
    9. 9)
    10. 10)
    11. 11)
    12. 12)
    13. 13)
      • 6. Hooge, F.N., Kleinpenning, T.G.M., Vandamme, L.K.J.: ‘Experimental studies on 1/f noise’. Reports On Progress in Physics., 1981, 44, pp. 497532.
    14. 14)
    15. 15)
    16. 16)
    17. 17)
    18. 18)
      • 2. Colinge, J.P.: ‘FinFETs and other multi-gate transistors’ (Springer-Verlag, 2008).
    19. 19)
    20. 20)
    21. 21)
    22. 22)
    23. 23)
      • 14. Lin, C-H., Dunga, M.V., Niknejad, A.M., et al: ‘A compact quantum-mechanical model for double-gate MOSFET’. Solid-State and Integrated Circuits Conf. (ICSICT), Shanghai, 2006, pp. 12721274.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds.2015.0128
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